Abstract
This paper presents two CMOS power drivers for interfacing low-voltage CMOS processing circuits to off-chip GaN switched-mode power amplifiers. The drivers employ stacked transistor configurations in a 45nm CMOS SOI technology to achieve 5V output voltage swing from 50MHz to 2GHz switching frequencies, with 20% to 80% pulse width dynamic range. The two driver architectures are compared with respect to design complexity, transient performance, silicon area, and power dissipation. Additionally, this work analyzes the implementation challenges and performance limitations when driving off-chip power devices using integrated silicon drivers.
| Original language | English (US) |
|---|---|
| Title of host publication | 2019 IEEE Radio and Wireless Symposium, RWS 2019 |
| Publisher | IEEE Computer Society |
| ISBN (Electronic) | 9781538659441 |
| DOIs | |
| State | Published - May 14 2019 |
| Event | 2019 IEEE Radio and Wireless Symposium, RWS 2019 - Orlando, United States Duration: Jan 20 2019 → Jan 23 2019 |
Publication series
| Name | IEEE Radio and Wireless Symposium, RWS |
|---|---|
| ISSN (Print) | 2164-2958 |
| ISSN (Electronic) | 2164-2974 |
Conference
| Conference | 2019 IEEE Radio and Wireless Symposium, RWS 2019 |
|---|---|
| Country | United States |
| City | Orlando |
| Period | 1/20/19 → 1/23/19 |
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Keywords
- CMOS
- Digital transmitter
- Gan
- High voltage
- Power amplifier
- Power driver
- Switched mode
ASJC Scopus subject areas
- Computer Networks and Communications
- Computer Science Applications
- Electrical and Electronic Engineering
- Communication
Cite this
CMOS power drivers for digital transmitters : Challenges and architectures. / Moallemi, Soroush; Grout, Kevin; Kitchen, Jennifer.
2019 IEEE Radio and Wireless Symposium, RWS 2019. IEEE Computer Society, 2019. 8714222 (IEEE Radio and Wireless Symposium, RWS).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - CMOS power drivers for digital transmitters
T2 - Challenges and architectures
AU - Moallemi, Soroush
AU - Grout, Kevin
AU - Kitchen, Jennifer
PY - 2019/5/14
Y1 - 2019/5/14
N2 - This paper presents two CMOS power drivers for interfacing low-voltage CMOS processing circuits to off-chip GaN switched-mode power amplifiers. The drivers employ stacked transistor configurations in a 45nm CMOS SOI technology to achieve 5V output voltage swing from 50MHz to 2GHz switching frequencies, with 20% to 80% pulse width dynamic range. The two driver architectures are compared with respect to design complexity, transient performance, silicon area, and power dissipation. Additionally, this work analyzes the implementation challenges and performance limitations when driving off-chip power devices using integrated silicon drivers.
AB - This paper presents two CMOS power drivers for interfacing low-voltage CMOS processing circuits to off-chip GaN switched-mode power amplifiers. The drivers employ stacked transistor configurations in a 45nm CMOS SOI technology to achieve 5V output voltage swing from 50MHz to 2GHz switching frequencies, with 20% to 80% pulse width dynamic range. The two driver architectures are compared with respect to design complexity, transient performance, silicon area, and power dissipation. Additionally, this work analyzes the implementation challenges and performance limitations when driving off-chip power devices using integrated silicon drivers.
KW - CMOS
KW - Digital transmitter
KW - Gan
KW - High voltage
KW - Power amplifier
KW - Power driver
KW - Switched mode
UR - http://www.scopus.com/inward/record.url?scp=85068722965&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85068722965&partnerID=8YFLogxK
U2 - 10.1109/RWS.2019.8714222
DO - 10.1109/RWS.2019.8714222
M3 - Conference contribution
T3 - IEEE Radio and Wireless Symposium, RWS
BT - 2019 IEEE Radio and Wireless Symposium, RWS 2019
PB - IEEE Computer Society
ER -