Circuit technique for threshold voltage stabilization using substrate bias in total dose environments

Jayanth K. Shreedhara, Hugh Barnaby, Bharat L. Bhuva, David V. Kerns, Sherra E. Kerns

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

Radiation tolerance of CMOS circuits to total dose can be improved by adjusting the p-substrate voltage to keep the n-channel threshold voltage above a minimum value. This paper presents a circuit design, implemented on an IC and on a breadboard, for dynamically adjusting the substrate voltage. Experimental results clearly show that devices with threshold voltage stabilization exhibit longer lifetime as compared to those without the stabilization circuit.

Original languageEnglish (US)
Pages (from-to)2557-2560
Number of pages4
JournalIEEE Transactions on Nuclear Science
Volume47
Issue number6 III
DOIs
StatePublished - Dec 2000
Externally publishedYes

Fingerprint

Threshold voltage
threshold voltage
Dosimetry
Stabilization
stabilization
dosage
Networks (circuits)
Substrates
adjusting
Electric potential
electric potential
radiation tolerance
CMOS
Radiation
life (durability)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Nuclear Energy and Engineering

Cite this

Circuit technique for threshold voltage stabilization using substrate bias in total dose environments. / Shreedhara, Jayanth K.; Barnaby, Hugh; Bhuva, Bharat L.; Kerns, David V.; Kerns, Sherra E.

In: IEEE Transactions on Nuclear Science, Vol. 47, No. 6 III, 12.2000, p. 2557-2560.

Research output: Contribution to journalArticle

Shreedhara, Jayanth K. ; Barnaby, Hugh ; Bhuva, Bharat L. ; Kerns, David V. ; Kerns, Sherra E. / Circuit technique for threshold voltage stabilization using substrate bias in total dose environments. In: IEEE Transactions on Nuclear Science. 2000 ; Vol. 47, No. 6 III. pp. 2557-2560.
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