Circuit technique for threshold voltage stabilization using substrate bias in total dose environments

Jayanth K. Shreedhara, Hugh J. Barnaby, Bharat L. Bhuva, David V. Kerns, Sherra E. Kerns

Research output: Contribution to journalConference article

3 Scopus citations

Abstract

Radiation tolerance of CMOS circuits to total dose can be improved by adjusting the p-substrate voltage to keep the n-channel threshold voltage above a minimum value. This paper presents a circuit design, implemented on an IC and on a breadboard, for dynamically adjusting the substrate voltage. Experimental results clearly show that devices with threshold voltage stabilization exhibit longer lifetime as compared to those without the stabilization circuit.

Original languageEnglish (US)
Pages (from-to)2557-2560
Number of pages4
JournalIEEE Transactions on Nuclear Science
Volume47
Issue number6 III
DOIs
StatePublished - Dec 1 2000
Event2000 IEEE Nuclear and Space Radiation Effects Conference (NSREC) - Reno, NV, United States
Duration: Jul 24 2000Jul 28 2000

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ASJC Scopus subject areas

  • Nuclear and High Energy Physics
  • Nuclear Energy and Engineering
  • Electrical and Electronic Engineering

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