Abstract
A device model suitable for circuit simulation programs is presented. This model accurately represents advanced-technology discrete power MOS transistors. The subcircuit model is implemented in any derivative of the SPICE 2 circuit simulator and consists of a depletion-mode JFET, an npn bipolar transistor, an enhancement-mode MOSFET, two diodes, and several passive elements. Combining an optimization program with the circuit simulator achieves agreement with measured static characteristics, such as first- and third-quadrant operation (including breakdown), and with dynamic characteristics, such as diode recovery, dV/dt turn-on, and switching waveforms. This technique eliminates the time-consuming and inaccurate sequential parameter extraction methods that are common to previous models. A library of parameter vectors for industry-standard power MOS devices is being created with this methodology.
| Original language | English (US) |
|---|---|
| Title of host publication | Conference Record - IAS Annual Meeting (IEEE Industry Applications Society) |
| Publisher | IEEE |
| Pages | 393-395 |
| Number of pages | 3 |
| State | Published - 1986 |
| Externally published | Yes |
ASJC Scopus subject areas
- Electrical and Electronic Engineering