Circuit aging prediction for low-power operation

Rui Zheng, Jyothi Velamala, Vijay Reddy, Varsha Balakrishnan, Evelyn Mintarno, Subhasish Mitra, Srikanth Krishnan, Yu Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

35 Citations (Scopus)

Abstract

Low-power circuit operations, such as dynamic voltage scaling and the sleep mode, pose a unique challenge to aging prediction. Traditional aging models assume constant voltage and averaged activity factor, ignoring the impact of the long sleep period, and thus, result in a significant overestimation of the degradation rate. To accurately predict the aging effect in low-power design, this work first examines critical model assumptions in the reaction-diffusion process that is responsible for the NBTI effect. By using the correct diffusion profile, it then proposes a new aging model that effectively analyzes the degradation under various low-power operations. The new model well predicts the aging behavior of scaled CMOS measurement data (45nm and 65nm) with different operation patterns, especially sleep mode operation and dynamic voltage scaling. Compared to previous aging models, the new result captures the essential role of the long recovery phase in circuit aging, reducing unnecessary guardbanding in reliability protection.

Original languageEnglish (US)
Title of host publicationProceedings of the Custom Integrated Circuits Conference
Pages427-430
Number of pages4
DOIs
StatePublished - 2009
Event2009 IEEE Custom Integrated Circuits Conference, CICC '09 - San Jose, CA, United States
Duration: Sep 13 2009Sep 16 2009

Other

Other2009 IEEE Custom Integrated Circuits Conference, CICC '09
CountryUnited States
CitySan Jose, CA
Period9/13/099/16/09

Fingerprint

Aging of materials
Networks (circuits)
Degradation
Recovery
Electric potential
Sleep
Voltage scaling

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Zheng, R., Velamala, J., Reddy, V., Balakrishnan, V., Mintarno, E., Mitra, S., ... Cao, Y. (2009). Circuit aging prediction for low-power operation. In Proceedings of the Custom Integrated Circuits Conference (pp. 427-430). [5280814] https://doi.org/10.1109/CICC.2009.5280814

Circuit aging prediction for low-power operation. / Zheng, Rui; Velamala, Jyothi; Reddy, Vijay; Balakrishnan, Varsha; Mintarno, Evelyn; Mitra, Subhasish; Krishnan, Srikanth; Cao, Yu.

Proceedings of the Custom Integrated Circuits Conference. 2009. p. 427-430 5280814.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zheng, R, Velamala, J, Reddy, V, Balakrishnan, V, Mintarno, E, Mitra, S, Krishnan, S & Cao, Y 2009, Circuit aging prediction for low-power operation. in Proceedings of the Custom Integrated Circuits Conference., 5280814, pp. 427-430, 2009 IEEE Custom Integrated Circuits Conference, CICC '09, San Jose, CA, United States, 9/13/09. https://doi.org/10.1109/CICC.2009.5280814
Zheng R, Velamala J, Reddy V, Balakrishnan V, Mintarno E, Mitra S et al. Circuit aging prediction for low-power operation. In Proceedings of the Custom Integrated Circuits Conference. 2009. p. 427-430. 5280814 https://doi.org/10.1109/CICC.2009.5280814
Zheng, Rui ; Velamala, Jyothi ; Reddy, Vijay ; Balakrishnan, Varsha ; Mintarno, Evelyn ; Mitra, Subhasish ; Krishnan, Srikanth ; Cao, Yu. / Circuit aging prediction for low-power operation. Proceedings of the Custom Integrated Circuits Conference. 2009. pp. 427-430
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