TY - GEN
T1 - Cation-based resistive memory
AU - Kozicki, Michael
PY - 2011/9/26
Y1 - 2011/9/26
N2 - This paper describes cation-based resistive memory, which utilizes a high resistance silver- or copper-containing oxide or higher chalcogenide electrolyte sandwiched between oxidizable and inert electrodes. Device function is via ion transport and redox reactions which form or dissolve a conductive metallic bridge. The on-state resistance is controlled by the programming conditions, allowing multi-level/multi-bit storage via discrete resistance states. A doped Si electrode may be used with the on-state filament to create an integrated rectifying isolation element which potentially allows multi-layer compact passive structures to be fabricated. The paper features foundry-produced arrays as well as some of the latest research findings on devices that utilize Ag-Ge-S and Cu-SiO2 ion conducting films.
AB - This paper describes cation-based resistive memory, which utilizes a high resistance silver- or copper-containing oxide or higher chalcogenide electrolyte sandwiched between oxidizable and inert electrodes. Device function is via ion transport and redox reactions which form or dissolve a conductive metallic bridge. The on-state resistance is controlled by the programming conditions, allowing multi-level/multi-bit storage via discrete resistance states. A doped Si electrode may be used with the on-state filament to create an integrated rectifying isolation element which potentially allows multi-layer compact passive structures to be fabricated. The paper features foundry-produced arrays as well as some of the latest research findings on devices that utilize Ag-Ge-S and Cu-SiO2 ion conducting films.
KW - Ionic memory
KW - Programmable Metallization Cell
KW - multi-level cell and active and passive arrays
KW - resistance change
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U2 - 10.1109/INEC.2011.5991737
DO - 10.1109/INEC.2011.5991737
M3 - Conference contribution
AN - SCOPUS:80053002387
SN - 9781457703799
T3 - Proceedings - International NanoElectronics Conference, INEC
BT - 4th IEEE International NanoElectronics Conference, INEC 2011
T2 - 4th IEEE International Nanoelectronics Conference, INEC 2011
Y2 - 21 June 2011 through 24 June 2011
ER -