Cation-based resistive memory

Michael Kozicki

doi:10.1109/INEC.2011.5991737

Cation-based resistive memory

Michael Kozicki

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Scopus citations

Abstract

This paper describes cation-based resistive memory, which utilizes a high resistance silver- or copper-containing oxide or higher chalcogenide electrolyte sandwiched between oxidizable and inert electrodes. Device function is via ion transport and redox reactions which form or dissolve a conductive metallic bridge. The on-state resistance is controlled by the programming conditions, allowing multi-level/multi-bit storage via discrete resistance states. A doped Si electrode may be used with the on-state filament to create an integrated rectifying isolation element which potentially allows multi-layer compact passive structures to be fabricated. The paper features foundry-produced arrays as well as some of the latest research findings on devices that utilize Ag-Ge-S and Cu-SiO₂ ion conducting films.

Original language	English (US)
Title of host publication	4th IEEE International NanoElectronics Conference, INEC 2011
DOIs	https://doi.org/10.1109/INEC.2011.5991737
State	Published - Sep 26 2011
Event	4th IEEE International Nanoelectronics Conference, INEC 2011 - Tao-Yuan, Taiwan, Province of China Duration: Jun 21 2011 → Jun 24 2011

Publication series

Name	Proceedings - International NanoElectronics Conference, INEC
ISSN (Print)	2159-3523

Other

Other	4th IEEE International Nanoelectronics Conference, INEC 2011
Country/Territory	Taiwan, Province of China
City	Tao-Yuan
Period	6/21/11 → 6/24/11

Keywords

Ionic memory
Programmable Metallization Cell
multi-level cell and active and passive arrays
resistance change

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/INEC.2011.5991737

Cite this

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title = "Cation-based resistive memory",

abstract = "This paper describes cation-based resistive memory, which utilizes a high resistance silver- or copper-containing oxide or higher chalcogenide electrolyte sandwiched between oxidizable and inert electrodes. Device function is via ion transport and redox reactions which form or dissolve a conductive metallic bridge. The on-state resistance is controlled by the programming conditions, allowing multi-level/multi-bit storage via discrete resistance states. A doped Si electrode may be used with the on-state filament to create an integrated rectifying isolation element which potentially allows multi-layer compact passive structures to be fabricated. The paper features foundry-produced arrays as well as some of the latest research findings on devices that utilize Ag-Ge-S and Cu-SiO2 ion conducting films.",

keywords = "Ionic memory, Programmable Metallization Cell, multi-level cell and active and passive arrays, resistance change",

author = "Michael Kozicki",

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doi = "10.1109/INEC.2011.5991737",

language = "English (US)",

isbn = "9781457703799",

series = "Proceedings - International NanoElectronics Conference, INEC",

booktitle = "4th IEEE International NanoElectronics Conference, INEC 2011",

note = "4th IEEE International Nanoelectronics Conference, INEC 2011 ; Conference date: 21-06-2011 Through 24-06-2011",

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AU - Kozicki, Michael

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Y1 - 2011/9/26

N2 - This paper describes cation-based resistive memory, which utilizes a high resistance silver- or copper-containing oxide or higher chalcogenide electrolyte sandwiched between oxidizable and inert electrodes. Device function is via ion transport and redox reactions which form or dissolve a conductive metallic bridge. The on-state resistance is controlled by the programming conditions, allowing multi-level/multi-bit storage via discrete resistance states. A doped Si electrode may be used with the on-state filament to create an integrated rectifying isolation element which potentially allows multi-layer compact passive structures to be fabricated. The paper features foundry-produced arrays as well as some of the latest research findings on devices that utilize Ag-Ge-S and Cu-SiO2 ion conducting films.

AB - This paper describes cation-based resistive memory, which utilizes a high resistance silver- or copper-containing oxide or higher chalcogenide electrolyte sandwiched between oxidizable and inert electrodes. Device function is via ion transport and redox reactions which form or dissolve a conductive metallic bridge. The on-state resistance is controlled by the programming conditions, allowing multi-level/multi-bit storage via discrete resistance states. A doped Si electrode may be used with the on-state filament to create an integrated rectifying isolation element which potentially allows multi-layer compact passive structures to be fabricated. The paper features foundry-produced arrays as well as some of the latest research findings on devices that utilize Ag-Ge-S and Cu-SiO2 ion conducting films.

KW - Ionic memory

KW - Programmable Metallization Cell

KW - multi-level cell and active and passive arrays

KW - resistance change

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DO - 10.1109/INEC.2011.5991737

M3 - Conference contribution

AN - SCOPUS:80053002387

SN - 9781457703799

T3 - Proceedings - International NanoElectronics Conference, INEC

BT - 4th IEEE International NanoElectronics Conference, INEC 2011

T2 - 4th IEEE International Nanoelectronics Conference, INEC 2011

Y2 - 21 June 2011 through 24 June 2011

ER -

Cation-based resistive memory

Abstract

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Keywords

ASJC Scopus subject areas

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