Carrier transport in nanodevices

David K. Ferry; Richard Akis; Sujeeth Udipi; Dragica Vasileska; David P. Pivin; Kevin M. Connolly; Jonathan P. Bird; Koji Ishibashi; Yoshinobu Aoyagi; Takuo Sugano; Yuichi Ochiai

doi:10.1143/jjap.36.1841

Carrier transport in nanodevices

David K. Ferry, Richard Akis, Sujeeth Udipi, Dragica Vasileska, David P. Pivin, Kevin M. Connolly, Jonathan P. Bird, Koji Ishibashi, Yoshinobu Aoyagi, Takuo Sugano, Yuichi Ochiai

Research output: Contribution to journal › Article › peer-review

Abstract

Future VLSI scaling realization of gate lengths is expected to 70 nm and below. While we do not know all the underlying physics, we are beginning to understand some limiting factors, which include quantum transport, in these structures. The discrete nature of impurities, the fact that devices have critical lengths comparable to their coherence lengths, and size quantization will all be important in these structures. These phenomena will lead to pockets of charge, which will appear as coupled quantum dots in the device transport. We review some of the physics of these dots.

Original language	English (US)
Pages (from-to)	1841-1845
Number of pages	5
Journal	Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume	36
Issue number	3 SUPPL. B
DOIs	https://doi.org/10.1143/jjap.36.1841
State	Published - Mar 1997

Keywords

Device modeling
Device physics
Inhomgeneities
Quantum dots
Quantum transport
Random impurities

ASJC Scopus subject areas

Engineering(all)
Physics and Astronomy(all)

Access to Document

10.1143/jjap.36.1841

Cite this

@article{86abbf88b7734476932bf996dd12509f,

title = "Carrier transport in nanodevices",

abstract = "Future VLSI scaling realization of gate lengths is expected to 70 nm and below. While we do not know all the underlying physics, we are beginning to understand some limiting factors, which include quantum transport, in these structures. The discrete nature of impurities, the fact that devices have critical lengths comparable to their coherence lengths, and size quantization will all be important in these structures. These phenomena will lead to pockets of charge, which will appear as coupled quantum dots in the device transport. We review some of the physics of these dots.",

keywords = "Device modeling, Device physics, Inhomgeneities, Quantum dots, Quantum transport, Random impurities",

author = "Ferry, {David K.} and Richard Akis and Sujeeth Udipi and Dragica Vasileska and Pivin, {David P.} and Connolly, {Kevin M.} and Bird, {Jonathan P.} and Koji Ishibashi and Yoshinobu Aoyagi and Takuo Sugano and Yuichi Ochiai",

year = "1997",

month = mar,

doi = "10.1143/jjap.36.1841",

language = "English (US)",

volume = "36",

pages = "1841--1845",

journal = "Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes",

issn = "0021-4922",

publisher = "Japan Society of Applied Physics",

number = "3 SUPPL. B",

}

TY - JOUR

T1 - Carrier transport in nanodevices

AU - Ferry, David K.

AU - Akis, Richard

AU - Udipi, Sujeeth

AU - Vasileska, Dragica

AU - Pivin, David P.

AU - Connolly, Kevin M.

AU - Bird, Jonathan P.

AU - Ishibashi, Koji

AU - Aoyagi, Yoshinobu

AU - Sugano, Takuo

AU - Ochiai, Yuichi

PY - 1997/3

Y1 - 1997/3

N2 - Future VLSI scaling realization of gate lengths is expected to 70 nm and below. While we do not know all the underlying physics, we are beginning to understand some limiting factors, which include quantum transport, in these structures. The discrete nature of impurities, the fact that devices have critical lengths comparable to their coherence lengths, and size quantization will all be important in these structures. These phenomena will lead to pockets of charge, which will appear as coupled quantum dots in the device transport. We review some of the physics of these dots.

AB - Future VLSI scaling realization of gate lengths is expected to 70 nm and below. While we do not know all the underlying physics, we are beginning to understand some limiting factors, which include quantum transport, in these structures. The discrete nature of impurities, the fact that devices have critical lengths comparable to their coherence lengths, and size quantization will all be important in these structures. These phenomena will lead to pockets of charge, which will appear as coupled quantum dots in the device transport. We review some of the physics of these dots.

KW - Device modeling

KW - Device physics

KW - Inhomgeneities

KW - Quantum dots

KW - Quantum transport

KW - Random impurities

UR - http://www.scopus.com/inward/record.url?scp=0040927842&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0040927842&partnerID=8YFLogxK

U2 - 10.1143/jjap.36.1841

DO - 10.1143/jjap.36.1841

M3 - Article

AN - SCOPUS:0040927842

SN - 0021-4922

VL - 36

SP - 1841

EP - 1845

JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

IS - 3 SUPPL. B

ER -

Carrier transport in nanodevices

Abstract

Keywords

ASJC Scopus subject areas

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