Can silicon FinFETs satisfy ITRS projections for high performance 10 nm devices?

H. Khan, D. Mamaluy, Dragica Vasileska

Research output: Contribution to journalArticle


We utilize a fully self-consistent quantum mechanical simulator based on CBR method to optimize 10 nm FinFET devices to meet ITRS projections for High Performance (HP) logic technology devices. Fin width, gate oxide thickness, and doping profiles are chosen to reflect realistic values. We find that the device on-current approaching the value projected by ITRS for HP devices can be obtained using unstrained conventional (Si) channel. Our simulation results also show that quantum nature of transport in ultra small devices significantly enhances the intrinsic switching speed of the device. In addition, small signal analysis has been performed. Sensitivity of device performance to the process variation at room temperature has also been investigated.

Original languageEnglish (US)
Pages (from-to)284-287
Number of pages4
JournalJournal of Computational Electronics
Issue number3
StatePublished - Jan 28 2008



  • CBR
  • Device optimization
  • FinFETs
  • Intrinsic switching speed
  • Process variation

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Modeling and Simulation
  • Electrical and Electronic Engineering

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