Cache vulnerability equations for protecting data in embedded processor caches from soft errors

Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul

Research output: Contribution to journalArticle

5 Citations (Scopus)

Abstract

Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, caches are most vulnerable to soft errors, and techniques at various levels of design abstraction, e.g., fabrication, gate design, circuit design, and microarchitecture-level, have been developed to protect data in caches. However, no work has been done to investigate the effect of code transformations on the vulnerability of data in caches. Data is vulnerable to soft errors in the cache only if it will be read by the processor, and not if it will be overwritten. Since code transformations can change the read-write pattern of program variables, they significantly effect the soft error vulnerability of program variables in the cache. We observe that often opportunity exists to significantly reduce the soft error vulnerability of cache data by trading-off a little performance. However, even if one wanted to exploit this trade-off, it is difficult, since there are no efficient techniques to estimate vulnerability of data in caches. To this end, this paper develops efficient static analysis method to estimate program vulnerability in caches, which enables the compiler to exploit the performance-vulnerability trade-offs in applications. Finally, as compared to simulation based estimation, static analysis techniques provide the insights into vulnerability calculations that provide some simple schemes to reduce program vulnerability.

Original languageEnglish (US)
Pages (from-to)143-152
Number of pages10
JournalACM SIGPLAN Notices
Volume45
Issue number4
StatePublished - Apr 2010

Fingerprint

Static analysis
Cosmic rays
Transistors
Fabrication
Networks (circuits)

Keywords

  • Cache vulnerability
  • Code transformation
  • Compiler technique
  • Embedded processors
  • Soft errors
  • Static analysis

ASJC Scopus subject areas

  • Computer Science(all)

Cite this

Cache vulnerability equations for protecting data in embedded processor caches from soft errors. / Shrivastava, Aviral; Lee, Jongeun; Jeyapaul, Reiley.

In: ACM SIGPLAN Notices, Vol. 45, No. 4, 04.2010, p. 143-152.

Research output: Contribution to journalArticle

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