C3SRAM: In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing

Zhewei Jiang, Shihui Yin, Jae Sun Seo, Mingoo Seok

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This letter presents C3SRAM,an in-memory-computing SRAM macro,which utilizes analog-mixed-signal capacitive-coupling computing to perform XNOR-and-accumulate operations for binary deep neural networks. The 256 × 64 C3SRAM macro asserts all 256 rows simultaneously and equips one ADC per column,realizing fully parallel vector-matrix multiplication in one cycle. C3SRAM demonstrates 672 TOPS/W and 1638 GOPS,and achieves 98.3% accuracy for MNIST and 85.5% for CIFAR-10 dataset. It achieves 3975× smaller energy-delay product than conventional digital processors.

Original languageEnglish (US)
Title of host publicationESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages131-134
Number of pages4
ISBN (Electronic)9781728115504
DOIs
StatePublished - Sep 2019
Event45th IEEE European Solid State Circuits Conference, ESSCIRC 2019 - Cracow, Poland
Duration: Sep 23 2019Sep 26 2019

Publication series

NameESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference

Conference

Conference45th IEEE European Solid State Circuits Conference, ESSCIRC 2019
CountryPoland
CityCracow
Period9/23/199/26/19

Fingerprint

TOPS (spacecraft)
Static random access storage
multiplication
Macros
central processing units
analogs
Data storage equipment
cycles
products
matrices
energy

Keywords

  • Capacitive coupling
  • in-memory-computing (IMC)
  • machine learning accelerator
  • mixed-signal processing
  • neural network

ASJC Scopus subject areas

  • Instrumentation
  • Electronic, Optical and Magnetic Materials
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Jiang, Z., Yin, S., Seo, J. S., & Seok, M. (2019). C3SRAM: In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing. In ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (pp. 131-134). [8902752] (ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ESSCIRC.2019.8902752

C3SRAM : In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing. / Jiang, Zhewei; Yin, Shihui; Seo, Jae Sun; Seok, Mingoo.

ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference. Institute of Electrical and Electronics Engineers Inc., 2019. p. 131-134 8902752 (ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Jiang, Z, Yin, S, Seo, JS & Seok, M 2019, C3SRAM: In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing. in ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference., 8902752, ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference, Institute of Electrical and Electronics Engineers Inc., pp. 131-134, 45th IEEE European Solid State Circuits Conference, ESSCIRC 2019, Cracow, Poland, 9/23/19. https://doi.org/10.1109/ESSCIRC.2019.8902752
Jiang Z, Yin S, Seo JS, Seok M. C3SRAM: In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing. In ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference. Institute of Electrical and Electronics Engineers Inc. 2019. p. 131-134. 8902752. (ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference). https://doi.org/10.1109/ESSCIRC.2019.8902752
Jiang, Zhewei ; Yin, Shihui ; Seo, Jae Sun ; Seok, Mingoo. / C3SRAM : In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing. ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 131-134 (ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference).
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