BW extension in shunt feedback transimpedance amplifiers using negative miller capacitance

Sushmit Goswami; Tino Copani; Bert Vermeire; Hugh Barnaby

doi:10.1109/ISCAS.2008.4541354

BW extension in shunt feedback transimpedance amplifiers using negative miller capacitance

Sushmit Goswami, Tino Copani, Bert Vermeire, Hugh Barnaby

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

12 Scopus citations

Abstract

The large input capacitance seen at the input of transimpedance amplifiers (TIA) used in optical receivers is usually the primary BW bottleneck. A new approach for increasing the BW of shunt feedback TIA's utilizing negative miller capacitance is presented which incurs no significant power, area or noise penalty. With this technique, 10 Gb/s performance is made possible with the usage of just a single common emitter stage resulting in a low power and low area design. The differential TIA was implemented in a 0.18 μm SiGe BiCMOS technology and consumes 10.9 mA from a 1.8 V supply. It provides 495 Ω gain, 7.7 GHz BW and has a noise density of 5.8 pA / √Hz @ 1 GHz. The technique is not technology dependent and may be applied to CMOS designs as well.

Original language	English (US)
Title of host publication	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Pages	61-64
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2008.4541354
State	Published - 2008
Event	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States Duration: May 18 2008 → May 21 2008

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Other

Other	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Country/Territory	United States
City	Seattle, WA
Period	5/18/08 → 5/21/08

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.2008.4541354

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BW extension in shunt feedback transimpedance amplifiers using negative miller capacitance. / Goswami, Sushmit; Copani, Tino; Vermeire, Bert et al.
2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008. 2008. p. 61-64 4541354 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Goswami, S, Copani, T, Vermeire, B & Barnaby, H 2008, BW extension in shunt feedback transimpedance amplifiers using negative miller capacitance. in 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008., 4541354, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 61-64, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008, Seattle, WA, United States, 5/18/08. https://doi.org/10.1109/ISCAS.2008.4541354

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abstract = "The large input capacitance seen at the input of transimpedance amplifiers (TIA) used in optical receivers is usually the primary BW bottleneck. A new approach for increasing the BW of shunt feedback TIA's utilizing negative miller capacitance is presented which incurs no significant power, area or noise penalty. With this technique, 10 Gb/s performance is made possible with the usage of just a single common emitter stage resulting in a low power and low area design. The differential TIA was implemented in a 0.18 μm SiGe BiCMOS technology and consumes 10.9 mA from a 1.8 V supply. It provides 495 Ω gain, 7.7 GHz BW and has a noise density of 5.8 pA / √Hz @ 1 GHz. The technique is not technology dependent and may be applied to CMOS designs as well.",

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AB - The large input capacitance seen at the input of transimpedance amplifiers (TIA) used in optical receivers is usually the primary BW bottleneck. A new approach for increasing the BW of shunt feedback TIA's utilizing negative miller capacitance is presented which incurs no significant power, area or noise penalty. With this technique, 10 Gb/s performance is made possible with the usage of just a single common emitter stage resulting in a low power and low area design. The differential TIA was implemented in a 0.18 μm SiGe BiCMOS technology and consumes 10.9 mA from a 1.8 V supply. It provides 495 Ω gain, 7.7 GHz BW and has a noise density of 5.8 pA / √Hz @ 1 GHz. The technique is not technology dependent and may be applied to CMOS designs as well.

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BW extension in shunt feedback transimpedance amplifiers using negative miller capacitance

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