TY - GEN
T1 - Built-in-self test of transmitter I/Q mismatch using self-mixing envelope detector
AU - Nassery, Afsaneh
AU - Byregowda, Srinath
AU - Ozev, Sule
AU - Verhelst, Marian
AU - Slamani, Mustapha
PY - 2012/8/20
Y1 - 2012/8/20
N2 - Built-in-Self-Test (BiST) for transmitters is a desirable choice since it eliminates the reliance on expensive instrumentation to do RF signal analysis. Existing on-chip resources, such as power or envelope detectors or small additional circuitry can be used for BiST purposes. However, due to limited bandwidth, measurement of complex specifications, such as IQ imbalance is challenging. Since these parameters are most amenable for digital compensation, their characterization and monitoring are desirable. In this paper, we propose a BiST technique for transmitter IQ imbalance using a self-mixing envelope detector. We first derive an analytical expression for the output signal. Using this expression, we devise test signals to isolate the effects of gain and phase imbalance, DC offsets, and time skews from other parameters of the system. Once isolated, these parameters are calculated easily with a few mathematical operations. Simulations and hardware measurements show that the technique can provide accurate characterization of IQ imbalances.
AB - Built-in-Self-Test (BiST) for transmitters is a desirable choice since it eliminates the reliance on expensive instrumentation to do RF signal analysis. Existing on-chip resources, such as power or envelope detectors or small additional circuitry can be used for BiST purposes. However, due to limited bandwidth, measurement of complex specifications, such as IQ imbalance is challenging. Since these parameters are most amenable for digital compensation, their characterization and monitoring are desirable. In this paper, we propose a BiST technique for transmitter IQ imbalance using a self-mixing envelope detector. We first derive an analytical expression for the output signal. Using this expression, we devise test signals to isolate the effects of gain and phase imbalance, DC offsets, and time skews from other parameters of the system. Once isolated, these parameters are calculated easily with a few mathematical operations. Simulations and hardware measurements show that the technique can provide accurate characterization of IQ imbalances.
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U2 - 10.1109/VTS.2012.6231080
DO - 10.1109/VTS.2012.6231080
M3 - Conference contribution
AN - SCOPUS:84865011965
SN - 9781467310741
T3 - Proceedings of the IEEE VLSI Test Symposium
SP - 56
EP - 61
BT - Proceedings - 2012 30th IEEE VLSI Test Symposium, VTS 2012
T2 - 2012 30th IEEE VLSI Test Symposium, VTS 2012
Y2 - 23 April 2012 through 26 April 2012
ER -