Abstract
Built-in self-test (BiST) for transmitters is a desirable choice since it eliminates the reliance on expensive instrumentation to perform radio-frequency signal analysis. Existing on-chip resources, such as power or envelope detectors or small additional circuitry, can be used for BiST purposes. However, due to limited bandwidth, measurement of complex specifications, such as in-phase and quadrature (IQ) imbalance, and third-order intermodulation intercept point (IIP3) is challenging. Since IQ imbalances are most amenable for digital compensation, their characterization and monitoring are desirable. In this paper, we propose a multistep BiST technique for transmitter IQ imbalance and nonlinearity using a self-mixing envelope detector. We derive analytical expressions for the output signal in linear and nonlinear modes. Using linear mode expression, we devise test signals to isolate the effects of gain and phase imbalances, dc offsets, and time skews from other parameters of the system in low-power mode. Once isolated, these parameters are calculated easily with a few mathematical operations. In the next step, using a higher power test signal, the nonlinear behavior of the transmitter is excited and the IIP3 of the transmitter is computed based on the analytical expressions. Simulations and hardware measurements show that the technique can provide accurate characterization of the path.
Original language | English (US) |
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Article number | 6851946 |
Pages (from-to) | 331-341 |
Number of pages | 11 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 23 |
Issue number | 2 |
DOIs | |
State | Published - Feb 1 2015 |
Keywords
- Built-in self-test (Bist)
- Third-order intercept point (IIP3).
- envelope detector
- in-phase and quadrature (IQ) imbalance
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering