TY - GEN
T1 - Built-in self-test for stability measurement of low dropout regulator
AU - Jeong, Jae Woong
AU - Yilmaz, Ender
AU - Winemberg, Leroy
AU - Ozev, Sule
N1 - Funding Information:
is supported by Semiconductor Research
Publisher Copyright:
© 2017 IEEE.
PY - 2017/12/29
Y1 - 2017/12/29
N2 - This paper presents a built-in self-test (BIST) system for Low-Dropout Regulators (LDO). Since the LDO is a closed-loop system, stability is a very important but oft-untested parameter for embedded LDOs. The proposed BIST system can measure stability-related parameters by performing cross correlation between an input pattern mimicking noise in the form of Pseudo Random Binary Sequence (PRBS) and the LDO output. In the proposed BIST system, PRBS is injected at the reference voltage input and a mixed-signal correlator is designed for multiplication and integration at the LDO output. A digital controller is designed to shift the PRBS sequence to enable cross-correlation and generate the required control signals. BIST circuit measures the impulse response in the time domain. LDO stability parameters, such as phase margin, can be calculated based on the impulse response. The proposed LDO BIST and an associated LDO as the design under test (DUT) are designed using GlobalFoundries 40nm process. Post layout simulations are performed in order to verify the functionality and performance of the BIST circuit. Post layout simulations show that the proposed BIST circuit can be used to measure the stability parameter with high accuracy. In addition, the proposed BIST has very low overhead.
AB - This paper presents a built-in self-test (BIST) system for Low-Dropout Regulators (LDO). Since the LDO is a closed-loop system, stability is a very important but oft-untested parameter for embedded LDOs. The proposed BIST system can measure stability-related parameters by performing cross correlation between an input pattern mimicking noise in the form of Pseudo Random Binary Sequence (PRBS) and the LDO output. In the proposed BIST system, PRBS is injected at the reference voltage input and a mixed-signal correlator is designed for multiplication and integration at the LDO output. A digital controller is designed to shift the PRBS sequence to enable cross-correlation and generate the required control signals. BIST circuit measures the impulse response in the time domain. LDO stability parameters, such as phase margin, can be calculated based on the impulse response. The proposed LDO BIST and an associated LDO as the design under test (DUT) are designed using GlobalFoundries 40nm process. Post layout simulations are performed in order to verify the functionality and performance of the BIST circuit. Post layout simulations show that the proposed BIST circuit can be used to measure the stability parameter with high accuracy. In addition, the proposed BIST has very low overhead.
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U2 - 10.1109/TEST.2017.8242033
DO - 10.1109/TEST.2017.8242033
M3 - Conference contribution
AN - SCOPUS:85046484508
T3 - Proceedings - International Test Conference
SP - 1
EP - 9
BT - Proceedings - 2017 IEEE International Test Conference, ITC 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 48th IEEE International Test Conference, ITC 2017
Y2 - 31 October 2017 through 2 November 2017
ER -