A 45-nm on-chip aging sensor is presented, which directly monitors circuit performance degradation during dynamic operation. A time-to-digital converter (TDC) circuit is integrated as a solution to directly sample circuit delay drift of a stressed data path and overcome the drawbacks of ring-oscillator (RO)-based test structures. TDC implementations in microprocessors have been reported recently for very high resolution path delay measurements. The most significant improvement with an embedded TDC is that the path degradation measurement is performed in an open-loop configuration. This enables it to detect signal edge degradation instead of frequency degradation, avoiding averaging the delay degradation over both signal edges. This sensor can monitor more than one data path and can include multiple data paths covering critical paths and paths designed to selectively accelerate particular aging mechanisms in comparison to other sensor designs.
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering