Asymmetric aging and workload sensitive bias temperature instability sensors

Min Chen, Vijay Reddy, Srikanth Krishnan, Venkatesh Srinivasan, Yu Cao

Research output: Contribution to journalArticle

14 Scopus citations

Abstract

A 45-nm on-chip aging sensor is presented, which directly monitors circuit performance degradation during dynamic operation. A time-to-digital converter (TDC) circuit is integrated as a solution to directly sample circuit delay drift of a stressed data path and overcome the drawbacks of ring-oscillator (RO)-based test structures. TDC implementations in microprocessors have been reported recently for very high resolution path delay measurements. The most significant improvement with an embedded TDC is that the path degradation measurement is performed in an open-loop configuration. This enables it to detect signal edge degradation instead of frequency degradation, avoiding averaging the delay degradation over both signal edges. This sensor can monitor more than one data path and can include multiple data paths covering critical paths and paths designed to selectively accelerate particular aging mechanisms in comparison to other sensor designs.

Original languageEnglish (US)
Article number6249796
Pages (from-to)18-26
Number of pages9
JournalIEEE Design and Test of Computers
Volume29
Issue number5
DOIs
StatePublished - Dec 1 2012

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ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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