A study conducts a comprehensive investigation on existing circuit optimization techniques against NBTI, degradation mechanism that has become a critical reliability issue for nano-scaled IC design. These techniques are categorized by their intrinsic characteristics and several important observations are made to give design guideline on NBTI mitigation. It is demonstrated that NBTI-aware circuit optimization techniques can be either compensation techniques or mitigation techniques. The two categories focus on reducing different parts of circuit delay and they have different efficiency, overheads, and complexity. All the optimization techniques tune electrical parameters which are easy to adjust, such as supply voltage, threshold voltage, and stress time. A popular physical origin of NBTI is the reaction-diffusion (R-D) mechanism where NBTI is described as the generation of charges in the Si/oxide interface.
- circuit optimization techniques
- negative bias temperature instability
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering