Approximation algorithm for process mapping on network processor architectures

Chris Ostler; Karam S. Chatha; Goran Konjevod

doi:10.1109/ASPDAC.2007.358048

Approximation algorithm for process mapping on network processor architectures

Chris Ostler, Karam S. Chatha, Goran Konjevod

Computing and Augmented Intelligence, School of (IAFSE-SCAI)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The high performance requirements of networking applications has led to the advent of programmable network processor (NP) architectures that incorporate symmetric multi-processing, and block multi-threading. The paper presents an automated system-level design technique for process mapping on such architectures with an objective of maximizing the worst case throughput of the application. As this mapping must be done in the presence of resource (processors and code size) constraints, this is an NP-complete problem [1]. We present a polynomial time approximation algorithm guaranteed to generate solutions with throughput at least 1/2 that of optimal solutions. The proposed algorithm was utilized to map realistic applications on the Intel IXP2400 (NP) architecture, and produced solutions within 78% of optimal.

Original language	English (US)
Title of host publication	Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007
Pages	577-582
Number of pages	6
DOIs	https://doi.org/10.1109/ASPDAC.2007.358048
State	Published - 2007
Event	ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007 - Yokohama, Japan Duration: Jan 23 2007 → Jan 27 2007

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other	ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007
Country/Territory	Japan
City	Yokohama
Period	1/23/07 → 1/27/07

ASJC Scopus subject areas

Computer Science Applications
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

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10.1109/ASPDAC.2007.358048

Cite this

Ostler, C., Chatha, K. S., & Konjevod, G. (2007). Approximation algorithm for process mapping on network processor architectures. In Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007 (pp. 577-582). Article 4196094 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2007.358048

Approximation algorithm for process mapping on network processor architectures. / Ostler, Chris; Chatha, Karam S.; Konjevod, Goran.
Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007. 2007. p. 577-582 4196094 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ostler, C, Chatha, KS & Konjevod, G 2007, Approximation algorithm for process mapping on network processor architectures. in Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007., 4196094, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 577-582, ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007, Yokohama, Japan, 1/23/07. https://doi.org/10.1109/ASPDAC.2007.358048

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Approximation algorithm for process mapping on network processor architectures

Abstract

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