Applications of three-dimensional topography simulation in the design of interconnect lines

A. Sheikholeslami, F. Parhami, R. Heinzl, E. Al-Ani, C. Heitzinger, F. Badrieh, H. Puchner, T. Grasser, S. Selberherr

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

We present an analysis of deposition of silicon nitride and silicon dioxide layers into three-dimensional interconnect structures. The investigations have been performed using our general purpose topography simulator ELSA (Enhanced Level Set Applications). We predict void formation and its characteristics, which play an important role for the formation of cracks which are observed during the passivation of layers covering IC chips.

Original languageEnglish (US)
Title of host publicationInternational Conference on Simulation of Semiconductor Processes and Devices, SISPAD
Pages187-190
Number of pages4
Volume2005
StatePublished - 2005
Externally publishedYes
Event2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005 - Tokyo, Japan
Duration: Sep 1 2005Sep 3 2005

Other

Other2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
CountryJapan
CityTokyo
Period9/1/059/3/05

Fingerprint

Silicon nitride
Passivation
Topography
Simulators
Silica
Cracks

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Sheikholeslami, A., Parhami, F., Heinzl, R., Al-Ani, E., Heitzinger, C., Badrieh, F., ... Selberherr, S. (2005). Applications of three-dimensional topography simulation in the design of interconnect lines. In International Conference on Simulation of Semiconductor Processes and Devices, SISPAD (Vol. 2005, pp. 187-190). [1562056]

Applications of three-dimensional topography simulation in the design of interconnect lines. / Sheikholeslami, A.; Parhami, F.; Heinzl, R.; Al-Ani, E.; Heitzinger, C.; Badrieh, F.; Puchner, H.; Grasser, T.; Selberherr, S.

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD. Vol. 2005 2005. p. 187-190 1562056.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Sheikholeslami, A, Parhami, F, Heinzl, R, Al-Ani, E, Heitzinger, C, Badrieh, F, Puchner, H, Grasser, T & Selberherr, S 2005, Applications of three-dimensional topography simulation in the design of interconnect lines. in International Conference on Simulation of Semiconductor Processes and Devices, SISPAD. vol. 2005, 1562056, pp. 187-190, 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005, Tokyo, Japan, 9/1/05.
Sheikholeslami A, Parhami F, Heinzl R, Al-Ani E, Heitzinger C, Badrieh F et al. Applications of three-dimensional topography simulation in the design of interconnect lines. In International Conference on Simulation of Semiconductor Processes and Devices, SISPAD. Vol. 2005. 2005. p. 187-190. 1562056
Sheikholeslami, A. ; Parhami, F. ; Heinzl, R. ; Al-Ani, E. ; Heitzinger, C. ; Badrieh, F. ; Puchner, H. ; Grasser, T. ; Selberherr, S. / Applications of three-dimensional topography simulation in the design of interconnect lines. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD. Vol. 2005 2005. pp. 187-190
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