Applications of three-dimensional topography simulation in the design of interconnect lines

A. Sheikholeslami; F. Parhami; R. Heinzl; E. Al-Ani; C. Heitzinger; F. Badrieh; H. Puchner; T. Grasser; S. Selberherr

doi:10.1109/sispad.2005.201504

Applications of three-dimensional topography simulation in the design of interconnect lines

A. Sheikholeslami, F. Parhami, R. Heinzl, E. Al-Ani, C. Heitzinger, F. Badrieh, H. Puchner, T. Grasser, S. Selberherr

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Scopus citations

Abstract

We present an analysis of deposition of silicon nitride and silicon dioxide layers into three-dimensional interconnect structures. The investigations have been performed using our general purpose topography simulator ELSA (Enhanced Level Set Applications). We predict void formation and its characteristics, which play an important role for the formation of cracks which are observed during the passivation of layers covering IC chips.

Original language	English (US)
Title of host publication	2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	187-190
Number of pages	4
ISBN (Print)	4990276205, 9784990276201
DOIs	https://doi.org/10.1109/sispad.2005.201504
State	Published - 2005
Externally published	Yes
Event	2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005 - Tokyo, Japan Duration: Sep 1 2005 → Sep 3 2005

Publication series

Name	International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
Volume	2005

Other

Other	2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
Country/Territory	Japan
City	Tokyo
Period	9/1/05 → 9/3/05

ASJC Scopus subject areas

General Engineering

Access to Document

10.1109/sispad.2005.201504

Cite this

Sheikholeslami, A., Parhami, F., Heinzl, R., Al-Ani, E., Heitzinger, C., Badrieh, F., Puchner, H., Grasser, T., & Selberherr, S. (2005). Applications of three-dimensional topography simulation in the design of interconnect lines. In 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005 (pp. 187-190). Article 1562056 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD; Vol. 2005). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/sispad.2005.201504

Applications of three-dimensional topography simulation in the design of interconnect lines. / Sheikholeslami, A.; Parhami, F.; Heinzl, R. et al.
2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005. Institute of Electrical and Electronics Engineers Inc., 2005. p. 187-190 1562056 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Sheikholeslami, A, Parhami, F, Heinzl, R, Al-Ani, E, Heitzinger, C, Badrieh, F, Puchner, H, Grasser, T & Selberherr, S 2005, Applications of three-dimensional topography simulation in the design of interconnect lines. in 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005., 1562056, International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, vol. 2005, Institute of Electrical and Electronics Engineers Inc., pp. 187-190, 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005, Tokyo, Japan, 9/1/05. https://doi.org/10.1109/sispad.2005.201504

Sheikholeslami A, Parhami F, Heinzl R, Al-Ani E, Heitzinger C, Badrieh F et al. Applications of three-dimensional topography simulation in the design of interconnect lines. In 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005. Institute of Electrical and Electronics Engineers Inc. 2005. p. 187-190. 1562056. (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD). doi: 10.1109/sispad.2005.201504

Sheikholeslami, A. ; Parhami, F. ; Heinzl, R. et al. / Applications of three-dimensional topography simulation in the design of interconnect lines. 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005. Institute of Electrical and Electronics Engineers Inc., 2005. pp. 187-190 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD).

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AU - Al-Ani, E.

AU - Heitzinger, C.

AU - Badrieh, F.

AU - Puchner, H.

AU - Grasser, T.

AU - Selberherr, S.

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AB - We present an analysis of deposition of silicon nitride and silicon dioxide layers into three-dimensional interconnect structures. The investigations have been performed using our general purpose topography simulator ELSA (Enhanced Level Set Applications). We predict void formation and its characteristics, which play an important role for the formation of cracks which are observed during the passivation of layers covering IC chips.

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ER -

Applications of three-dimensional topography simulation in the design of interconnect lines

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