Applications of three-dimensional topography simulation in the design of interconnect lines

A. Sheikholeslami, F. Parhami, R. Heinzl, E. Al-Ani, C. Heitzinger, F. Badrieh, H. Puchner, T. Grasser, S. Selberherr

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

We present an analysis of deposition of silicon nitride and silicon dioxide layers into three-dimensional interconnect structures. The investigations have been performed using our general purpose topography simulator ELSA (Enhanced Level Set Applications). We predict void formation and its characteristics, which play an important role for the formation of cracks which are observed during the passivation of layers covering IC chips.

Original languageEnglish (US)
Title of host publication2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages187-190
Number of pages4
ISBN (Print)4990276205, 9784990276201
DOIs
StatePublished - Jan 1 2005
Externally publishedYes
Event2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005 - Tokyo, Japan
Duration: Sep 1 2005Sep 3 2005

Publication series

NameInternational Conference on Simulation of Semiconductor Processes and Devices, SISPAD
Volume2005

Other

Other2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
CountryJapan
CityTokyo
Period9/1/059/3/05

ASJC Scopus subject areas

  • Engineering(all)

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