Trends in VLSI process design have produced transistors with small dimensions and narrow depletion widths. Small geometry transistors have much higher electric fields than the larger ones. These fields are capable of heating the charge carriers to a sufficient energy which enables them to penetrate the silicon-silicon dioxide barrier. Once the carriers enter the gate oxide they may find their way to the gate or get trapped in the gate oxide. Both the passage of carriers through the oxide and trapping cause degradation in transistor performance. Study of hot carrier generation, transport, and trapping is hampered by the difficulty, if not impossibility, of directly observing the hot carriers. In some configurations, such as hole trapping in an n-channel MOSFET, no overall effect would be observed if only part of the channel is affected. This presentation addresses a new transistor structure that could be very useful in studying possible hot hole trapping in n-channel MOSFETs.
|Original language||English (US)|
|Pages (from-to)||4. 1-4. 4|
|Journal||IEE Colloquium (Digest)|
|Issue number||1987 /15|
|State||Published - Dec 1 1987|
ASJC Scopus subject areas
- Electrical and Electronic Engineering