Analyzing inference robustness of RRAM synaptic array in low-precision neural network

Rui Liu, Heng Yuan Lee, Shimeng Yu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

In this work, we investigate the robustness of 1-transistor-1-resistor (1T1R) synaptic array to implement a low-precision neural network. The experimental results on 1 kb HfOx-based RRAM array show a large on/off ratio (i.e. > 105×) and 5 stable resistance states can be reliably achieved with 10× window between adjacent two states. As the RRAM has the resistance drift over time under read voltage stress, the impact of read disturbance occurred in 1T1R synaptic array on the neural network classification accuracy is analyzed with the RRAM compact model fitted with experimental data. The simulation results of a single-layer perceptron with compressed MNIST dataset indicate that 1) more stable multi-level states are desired to have higher mapping capability of weights, thus achieving a higher initial classification accuracy; 2) good mapping strategies that avoid the read disturbance-induced sign change on the most significant weight levels are very important to mitigate the classification accuracy loss.

Original languageEnglish (US)
Title of host publication2017 47th European Solid-State Device Research Conference, ESSDERC 2017
PublisherEditions Frontieres
Pages18-21
Number of pages4
ISBN (Electronic)9781509059782
DOIs
StatePublished - Oct 12 2017
Event47th European Solid-State Device Research Conference, ESSDERC 2017 - Leuven, Belgium
Duration: Sep 11 2017Sep 14 2017

Other

Other47th European Solid-State Device Research Conference, ESSDERC 2017
CountryBelgium
CityLeuven
Period9/11/179/14/17

Keywords

  • 1T1R
  • classification accuracy
  • inference
  • multi-level states
  • Neural network
  • read disturbance
  • RRAM

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Liu, R., Lee, H. Y., & Yu, S. (2017). Analyzing inference robustness of RRAM synaptic array in low-precision neural network. In 2017 47th European Solid-State Device Research Conference, ESSDERC 2017 (pp. 18-21). [8066581] Editions Frontieres. https://doi.org/10.1109/ESSDERC.2017.8066581