Analog implementation of a 'neural' optimization network

M. T. Musavi; A. Roy

doi:10.1016/0893-6080(88)90421-2

Analog implementation of a 'neural' optimization network

M. T. Musavi, A. Roy

Research output: Contribution to journal › Conference article › peer-review

Abstract

An analog implementation of a neural network has been developed. The circuit is constructed of discrete analog devices. It utilizes a neuron model with graded response property to solve optimization problems. The neuron, which has symmetric synaptic connections, is based on the Hopfield model. The model uses the collective computation properties of analog processor networks. The architecture of the electronic circuitry consists of a highly interconnected network of processing elements, where each processing element is an amplifier to model the firing of a neuron and has an inverted and non-inverted output to enable both excitary and inhibitory connections. The interconnection is of resistive nature.

Original language	English (US)
Pages (from-to)	395
Number of pages	1
Journal	Neural Networks
Volume	1
Issue number	1 SUPPL
DOIs	https://doi.org/10.1016/0893-6080(88)90421-2
State	Published - 1988
Externally published	Yes
Event	International Neural Network Society 1988 First Annual Meeting - Boston, MA, USA Duration: Sep 6 1988 → Sep 10 1988

ASJC Scopus subject areas

Cognitive Neuroscience
Artificial Intelligence

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10.1016/0893-6080(88)90421-2

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@article{d63515a087914d178f8bc8f0c976f628,

title = "Analog implementation of a 'neural' optimization network",

abstract = "An analog implementation of a neural network has been developed. The circuit is constructed of discrete analog devices. It utilizes a neuron model with graded response property to solve optimization problems. The neuron, which has symmetric synaptic connections, is based on the Hopfield model. The model uses the collective computation properties of analog processor networks. The architecture of the electronic circuitry consists of a highly interconnected network of processing elements, where each processing element is an amplifier to model the firing of a neuron and has an inverted and non-inverted output to enable both excitary and inhibitory connections. The interconnection is of resistive nature.",

author = "Musavi, {M. T.} and A. Roy",

year = "1988",

doi = "10.1016/0893-6080(88)90421-2",

language = "English (US)",

volume = "1",

pages = "395",

journal = "Neural Networks",

issn = "0893-6080",

publisher = "Elsevier Limited",

number = "1 SUPPL",

note = "International Neural Network Society 1988 First Annual Meeting ; Conference date: 06-09-1988 Through 10-09-1988",

}

TY - JOUR

T1 - Analog implementation of a 'neural' optimization network

AU - Musavi, M. T.

AU - Roy, A.

PY - 1988

Y1 - 1988

N2 - An analog implementation of a neural network has been developed. The circuit is constructed of discrete analog devices. It utilizes a neuron model with graded response property to solve optimization problems. The neuron, which has symmetric synaptic connections, is based on the Hopfield model. The model uses the collective computation properties of analog processor networks. The architecture of the electronic circuitry consists of a highly interconnected network of processing elements, where each processing element is an amplifier to model the firing of a neuron and has an inverted and non-inverted output to enable both excitary and inhibitory connections. The interconnection is of resistive nature.

AB - An analog implementation of a neural network has been developed. The circuit is constructed of discrete analog devices. It utilizes a neuron model with graded response property to solve optimization problems. The neuron, which has symmetric synaptic connections, is based on the Hopfield model. The model uses the collective computation properties of analog processor networks. The architecture of the electronic circuitry consists of a highly interconnected network of processing elements, where each processing element is an amplifier to model the firing of a neuron and has an inverted and non-inverted output to enable both excitary and inhibitory connections. The interconnection is of resistive nature.

UR - http://www.scopus.com/inward/record.url?scp=0024171789&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0024171789&partnerID=8YFLogxK

U2 - 10.1016/0893-6080(88)90421-2

DO - 10.1016/0893-6080(88)90421-2

M3 - Conference article

AN - SCOPUS:0024171789

SN - 0893-6080

VL - 1

SP - 395

JO - Neural Networks

JF - Neural Networks

IS - 1 SUPPL

T2 - International Neural Network Society 1988 First Annual Meeting

Y2 - 6 September 1988 through 10 September 1988

ER -

Analog implementation of a 'neural' optimization network

Abstract

ASJC Scopus subject areas

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