An optimal analytical solution for processor speed control with thermal constraints

Ravishankar Rao, Sarma Vrudhula, Chaitali Chakrabarti, Naehyuck Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

33 Scopus citations

Abstract

As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (DVFS) is a well-known technique for conserving energy. Recently, it has also been used to control the CPU temperature as part of Dynamic Thermal Management (DTM) techniques. Most works in these areas assume that the optimum speed profile (for either minimizing energy or maximizing performance) is a constant profile. However, in the presence of thermal constraints, we show that the optimal profile is in general, a time-varying function. We formulate the problem of maximizing the average throughput of a processor over a given time period, subject to thermal and speed constraints, as a problem in the calculus of variations. The variational approach provides a powerful framework for precisely specifying and solving the speed control problem, and allows us to obtain an exact analytical solution. The solution methodology is very general, and works for any convex power model, and simple lumped RC thermal models. The resulting speed profiles were found to consist of up to three segments, of which one of them is a decreasing function of time, and the others are constant. We analyze the effect of different parameters like the initial temperature, thermal capacitance and the maximum rated speed on the nature and the cost of the optimum solution. We also propose a two-speed solution that approximates the optimal speed curve. This solution was found to achieve a performance close to that of the optimum, and is also easier to implement in real processors.

Original languageEnglish (US)
Title of host publicationISLPED'06 - Proceedings of the 2006 International Symposium on Low Power Electronics and Design
Pages292-297
Number of pages6
DOIs
StatePublished - Dec 1 2006
EventISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design - Tegernsee, Bavaria, Germany
Duration: Oct 4 2006Oct 6 2006

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
Volume2006
ISSN (Print)1533-4678

Other

OtherISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design
CountryGermany
CityTegernsee, Bavaria
Period10/4/0610/6/06

Keywords

  • DIM
  • DVFS
  • Optimal control
  • Temperature
  • Thermal management

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint Dive into the research topics of 'An optimal analytical solution for processor speed control with thermal constraints'. Together they form a unique fingerprint.

  • Cite this

    Rao, R., Vrudhula, S., Chakrabarti, C., & Chang, N. (2006). An optimal analytical solution for processor speed control with thermal constraints. In ISLPED'06 - Proceedings of the 2006 International Symposium on Low Power Electronics and Design (pp. 292-297). (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2006). https://doi.org/10.1145/1165573.1165643