An industrial case study of analog fault modeling

Ender Yilmaz, Anne Meixner, Sule Ozev

Research output: Chapter in Book/Report/Conference proceedingConference contribution

19 Scopus citations

Abstract

Analog fault modeling (AFM) provides a quantitative measure of quality and insight into defective device behavior. However, the high computational burden typically associated with fault simulation makes it unappealing for industrial applications. We propose an efficient methodology to reduce computational burden of the AFM method by exploiting the hierarchical nature of process variation. We apply the proposed methodology on an industrial SerDes TX Driver circuit and achieve 98% simulation time reduction. We quantify defect impact with a defect severity measure.

Original languageEnglish (US)
Title of host publicationProceedings - 2011 29th IEEE VLSI Test Symposium, VTS 2011
Pages178-183
Number of pages6
DOIs
StatePublished - Jul 1 2011
Event2011 29th IEEE VLSI Test Symposium, VTS 2011 - Dana Point, CA, United States
Duration: May 1 2011May 5 2011

Publication series

NameProceedings of the IEEE VLSI Test Symposium

Other

Other2011 29th IEEE VLSI Test Symposium, VTS 2011
CountryUnited States
CityDana Point, CA
Period5/1/115/5/11

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

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