TY - GEN
T1 - An industrial case study of analog fault modeling
AU - Yilmaz, Ender
AU - Meixner, Anne
AU - Ozev, Sule
PY - 2011/7/1
Y1 - 2011/7/1
N2 - Analog fault modeling (AFM) provides a quantitative measure of quality and insight into defective device behavior. However, the high computational burden typically associated with fault simulation makes it unappealing for industrial applications. We propose an efficient methodology to reduce computational burden of the AFM method by exploiting the hierarchical nature of process variation. We apply the proposed methodology on an industrial SerDes TX Driver circuit and achieve 98% simulation time reduction. We quantify defect impact with a defect severity measure.
AB - Analog fault modeling (AFM) provides a quantitative measure of quality and insight into defective device behavior. However, the high computational burden typically associated with fault simulation makes it unappealing for industrial applications. We propose an efficient methodology to reduce computational burden of the AFM method by exploiting the hierarchical nature of process variation. We apply the proposed methodology on an industrial SerDes TX Driver circuit and achieve 98% simulation time reduction. We quantify defect impact with a defect severity measure.
UR - http://www.scopus.com/inward/record.url?scp=79959633243&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=79959633243&partnerID=8YFLogxK
U2 - 10.1109/VTS.2011.5783780
DO - 10.1109/VTS.2011.5783780
M3 - Conference contribution
AN - SCOPUS:79959633243
SN - 9781612846552
T3 - Proceedings of the IEEE VLSI Test Symposium
SP - 178
EP - 183
BT - Proceedings - 2011 29th IEEE VLSI Test Symposium, VTS 2011
T2 - 2011 29th IEEE VLSI Test Symposium, VTS 2011
Y2 - 1 May 2011 through 5 May 2011
ER -