An in-plane high-sensitivity, low-noise micro-g silicon accelerometer with CMOS readout circuitry

Junseok Chae, Haluk Kulah, Khalil Najafi

Research output: Contribution to journalArticle

77 Scopus citations


A high-sensitivity, low-noise in-plane (lateral) capacitive silicon microaccelerometer utilizing a combined surface and bulk micromachining technology is reported. The accelerometer utilizes a 0.5-mm-thick, 2.4 × 1.0 mm2 proof-mass and high aspect-ratio vertical polysilicon sensing electrodes fabricated using a trench refill process. The electrodes are separated from the proof-mass by a 1.1-μm sensing gap formed using a sacrificial oxide layer. The measured device sensitivity is 5.6 pF/g. A CMOS readout circuit utilizing a switched-capacitor front-end Σ-Δ modulator operating at 1 MHz with chopper stabilization and correlated double sampling technique, can resolve a capacitance of 10 aF over a dynamic range of 120 dB in a 1 Hz BW. The measured input referred noise floor of the accelerometer - CMOS interface circuit is 1.6μg/√Hz in atmosphere.

Original languageEnglish (US)
Pages (from-to)628-635
Number of pages8
JournalJournal of Microelectromechanical Systems
Issue number4
Publication statusPublished - Aug 2004
Externally publishedYes


ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Mechanical Engineering

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