An embedded architecture for energy-efficient stream computing

Amrit Panda, Karam S. Chatha

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Stream processing has emerged as an important model of computation in the context of multimedia and communication subsystems of embedded system-on-chip (SoC) architectures. The dataflow nature of streaming applications allows them to be most naturally expressed as a set of kernels iteratively operating on continuous streams of data. The kernels are computationally intensive and are characterized by high throughput requirements. We present StreamEngine, an embedded architecture for energy-efficient computation of stream kernels. StreamEngine introduces an instruction locking mechanism that exploits the iterative nature of streams and enables fine-grain instruction reuse. We also adopt a context-aware dataflow execution (CDE) model to exploit instruction-level parallelism (ILP) and data-level parallelism (DLP) within the stream kernels. We evaluate the performance and energy-efficiency of our architecture for stream kernel benchmarks by implementing the architecture with TSMC 45 nm process, and comparison with an embedded RISC processor.

Original languageEnglish (US)
Article number6824830
Pages (from-to)57-60
Number of pages4
JournalIEEE Embedded Systems Letters
Volume6
Issue number3
DOIs
StatePublished - 2014
Externally publishedYes

Fingerprint

Reduced instruction set computing
Embedded systems
Energy efficiency
Throughput
Communication
Processing
System-on-chip

Keywords

  • Dataflow
  • Low-power design
  • Reservation station
  • Stream computing

ASJC Scopus subject areas

  • Computer Science(all)
  • Control and Systems Engineering

Cite this

An embedded architecture for energy-efficient stream computing. / Panda, Amrit; Chatha, Karam S.

In: IEEE Embedded Systems Letters, Vol. 6, No. 3, 6824830, 2014, p. 57-60.

Research output: Contribution to journalArticle

Panda, Amrit ; Chatha, Karam S. / An embedded architecture for energy-efficient stream computing. In: IEEE Embedded Systems Letters. 2014 ; Vol. 6, No. 3. pp. 57-60.
@article{6c8c66399e1c4417b9c15600beeec882,
title = "An embedded architecture for energy-efficient stream computing",
abstract = "Stream processing has emerged as an important model of computation in the context of multimedia and communication subsystems of embedded system-on-chip (SoC) architectures. The dataflow nature of streaming applications allows them to be most naturally expressed as a set of kernels iteratively operating on continuous streams of data. The kernels are computationally intensive and are characterized by high throughput requirements. We present StreamEngine, an embedded architecture for energy-efficient computation of stream kernels. StreamEngine introduces an instruction locking mechanism that exploits the iterative nature of streams and enables fine-grain instruction reuse. We also adopt a context-aware dataflow execution (CDE) model to exploit instruction-level parallelism (ILP) and data-level parallelism (DLP) within the stream kernels. We evaluate the performance and energy-efficiency of our architecture for stream kernel benchmarks by implementing the architecture with TSMC 45 nm process, and comparison with an embedded RISC processor.",
keywords = "Dataflow, Low-power design, Reservation station, Stream computing",
author = "Amrit Panda and Chatha, {Karam S.}",
year = "2014",
doi = "10.1109/LES.2014.2326895",
language = "English (US)",
volume = "6",
pages = "57--60",
journal = "IEEE Embedded Systems Letters",
issn = "1943-0663",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "3",

}

TY - JOUR

T1 - An embedded architecture for energy-efficient stream computing

AU - Panda, Amrit

AU - Chatha, Karam S.

PY - 2014

Y1 - 2014

N2 - Stream processing has emerged as an important model of computation in the context of multimedia and communication subsystems of embedded system-on-chip (SoC) architectures. The dataflow nature of streaming applications allows them to be most naturally expressed as a set of kernels iteratively operating on continuous streams of data. The kernels are computationally intensive and are characterized by high throughput requirements. We present StreamEngine, an embedded architecture for energy-efficient computation of stream kernels. StreamEngine introduces an instruction locking mechanism that exploits the iterative nature of streams and enables fine-grain instruction reuse. We also adopt a context-aware dataflow execution (CDE) model to exploit instruction-level parallelism (ILP) and data-level parallelism (DLP) within the stream kernels. We evaluate the performance and energy-efficiency of our architecture for stream kernel benchmarks by implementing the architecture with TSMC 45 nm process, and comparison with an embedded RISC processor.

AB - Stream processing has emerged as an important model of computation in the context of multimedia and communication subsystems of embedded system-on-chip (SoC) architectures. The dataflow nature of streaming applications allows them to be most naturally expressed as a set of kernels iteratively operating on continuous streams of data. The kernels are computationally intensive and are characterized by high throughput requirements. We present StreamEngine, an embedded architecture for energy-efficient computation of stream kernels. StreamEngine introduces an instruction locking mechanism that exploits the iterative nature of streams and enables fine-grain instruction reuse. We also adopt a context-aware dataflow execution (CDE) model to exploit instruction-level parallelism (ILP) and data-level parallelism (DLP) within the stream kernels. We evaluate the performance and energy-efficiency of our architecture for stream kernel benchmarks by implementing the architecture with TSMC 45 nm process, and comparison with an embedded RISC processor.

KW - Dataflow

KW - Low-power design

KW - Reservation station

KW - Stream computing

UR - http://www.scopus.com/inward/record.url?scp=84906822055&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84906822055&partnerID=8YFLogxK

U2 - 10.1109/LES.2014.2326895

DO - 10.1109/LES.2014.2326895

M3 - Article

AN - SCOPUS:84906822055

VL - 6

SP - 57

EP - 60

JO - IEEE Embedded Systems Letters

JF - IEEE Embedded Systems Letters

SN - 1943-0663

IS - 3

M1 - 6824830

ER -