An efficient timestamp-based monitoring approach to test timing constraints of cyber-physical systems

Mohammadreza Mehrabian, Mohammad Khayatian, Ahmed Mousa, Aviral Shrivastava, Ya Shian Li-Baboud, Patricia Derler, Edward Griffor, Hugo A. Andrade, Marc Wiess, John C. Eidson, Dhananjay Anand

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Formal specifications on temporal behavior of Cyber-Physical Systems (CPS) is essential for verification of performance and safety. Existing solutions for verifying the satisfaction of temporal constraints on a CPS are compute and resource intensive since they require buffering signals from the CPS prior to constraint checking. We present an online approach, based on Timestamp Temporal Logic (TTL), for monitoring the timing constraints in CPS. The approach reduces the computation and memory requirements by processing the timestamps of pertinent events reducing the need to capture the full data set from the signal sampling. The signal buffer size bears a geometric relationship to the dimension of the signal vector, the time interval being considered, and the sampling resolution. Since monitoring logic is typically implemented on Field Programmable Gate Arrays (FPGAs) for efficient monitoring of multiple signals simultaneously, the space required to store the buffered data becomes the limiting resource. The monitoring logic, for the timing constraints on the Flying Paster (a printing application requiring synchronization between two motors), is illustrated in this paper to demonstrate a geometric reduction in memory and computational resources in the realization of an online monitor.

Original languageEnglish (US)
Title of host publicationProceedings of the 55th Annual Design Automation Conference, DAC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781450357005
DOIs
StatePublished - Jun 24 2018
Event55th Annual Design Automation Conference, DAC 2018 - San Francisco, United States
Duration: Jun 24 2018Jun 29 2018

Publication series

NameProceedings - Design Automation Conference
VolumePart F137710
ISSN (Print)0738-100X

Other

Other55th Annual Design Automation Conference, DAC 2018
CountryUnited States
CitySan Francisco
Period6/24/186/29/18

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

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    Mehrabian, M., Khayatian, M., Mousa, A., Shrivastava, A., Li-Baboud, Y. S., Derler, P., Griffor, E., Andrade, H. A., Wiess, M., Eidson, J. C., & Anand, D. (2018). An efficient timestamp-based monitoring approach to test timing constraints of cyber-physical systems. In Proceedings of the 55th Annual Design Automation Conference, DAC 2018 [a144] (Proceedings - Design Automation Conference; Vol. Part F137710). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/3195970.3196130