Amorphous silicon logic circuits on flexible substrates

Rahul Shringarpure; Lawrence T. Clark; Sameer M. Venugopal; David Allee; Shrinivas G. Uppili

doi:10.1109/CICC.2008.4672053

Amorphous silicon logic circuits on flexible substrates

Rahul Shringarpure, Lawrence T. Clark, Sameer M. Venugopal, David Allee, Shrinivas G. Uppili

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

11 Scopus citations

Abstract

This paper describes the design of amorphous silicon (a-Si:H) logic circuits using static and dynamic programmable logic arrays (PLA's) as the baseline examples. The PLA's are designed with n-channel a-Si:H thin film transistors (TFT's) manufactured in a low temperature (180°C) process for flexible substrates. Measured and simulated results demonstrate that dynamic circuits are the best design approach, from both a power and delay viewpoint, for a-Si:H flexible logic circuits.

Original language	English (US)
Title of host publication	Proceedings of the Custom Integrated Circuits Conference
Pages	181-184
Number of pages	4
DOIs	https://doi.org/10.1109/CICC.2008.4672053
State	Published - 2008
Event	IEEE 2008 Custom Integrated Circuits Conference, CICC 2008 - San Jose, CA, United States Duration: Sep 21 2008 → Sep 24 2008

Other

Other	IEEE 2008 Custom Integrated Circuits Conference, CICC 2008
Country/Territory	United States
City	San Jose, CA
Period	9/21/08 → 9/24/08

Keywords

a-Si:H TFT
Combinational logic
Flexible electronics
Threshold voltage degradation

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/CICC.2008.4672053

Cite this

@inproceedings{1d4bedbb5ba24bc1b4935c372fa02465,

title = "Amorphous silicon logic circuits on flexible substrates",

abstract = "This paper describes the design of amorphous silicon (a-Si:H) logic circuits using static and dynamic programmable logic arrays (PLA's) as the baseline examples. The PLA's are designed with n-channel a-Si:H thin film transistors (TFT's) manufactured in a low temperature (180°C) process for flexible substrates. Measured and simulated results demonstrate that dynamic circuits are the best design approach, from both a power and delay viewpoint, for a-Si:H flexible logic circuits.",

keywords = "a-Si:H TFT, Combinational logic, Flexible electronics, Threshold voltage degradation",

author = "Rahul Shringarpure and Clark, {Lawrence T.} and Venugopal, {Sameer M.} and David Allee and Uppili, {Shrinivas G.}",

year = "2008",

doi = "10.1109/CICC.2008.4672053",

language = "English (US)",

pages = "181--184",

booktitle = "Proceedings of the Custom Integrated Circuits Conference",

note = "IEEE 2008 Custom Integrated Circuits Conference, CICC 2008 ; Conference date: 21-09-2008 Through 24-09-2008",

}

TY - GEN

T1 - Amorphous silicon logic circuits on flexible substrates

AU - Shringarpure, Rahul

AU - Clark, Lawrence T.

AU - Venugopal, Sameer M.

AU - Allee, David

AU - Uppili, Shrinivas G.

PY - 2008

Y1 - 2008

N2 - This paper describes the design of amorphous silicon (a-Si:H) logic circuits using static and dynamic programmable logic arrays (PLA's) as the baseline examples. The PLA's are designed with n-channel a-Si:H thin film transistors (TFT's) manufactured in a low temperature (180°C) process for flexible substrates. Measured and simulated results demonstrate that dynamic circuits are the best design approach, from both a power and delay viewpoint, for a-Si:H flexible logic circuits.

AB - This paper describes the design of amorphous silicon (a-Si:H) logic circuits using static and dynamic programmable logic arrays (PLA's) as the baseline examples. The PLA's are designed with n-channel a-Si:H thin film transistors (TFT's) manufactured in a low temperature (180°C) process for flexible substrates. Measured and simulated results demonstrate that dynamic circuits are the best design approach, from both a power and delay viewpoint, for a-Si:H flexible logic circuits.

KW - a-Si:H TFT

KW - Combinational logic

KW - Flexible electronics

KW - Threshold voltage degradation

UR - http://www.scopus.com/inward/record.url?scp=57849146131&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=57849146131&partnerID=8YFLogxK

U2 - 10.1109/CICC.2008.4672053

DO - 10.1109/CICC.2008.4672053

M3 - Conference contribution

AN - SCOPUS:57849146131

SP - 181

EP - 184

BT - Proceedings of the Custom Integrated Circuits Conference

T2 - IEEE 2008 Custom Integrated Circuits Conference, CICC 2008

Y2 - 21 September 2008 through 24 September 2008

ER -

Amorphous silicon logic circuits on flexible substrates

Abstract

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Keywords

ASJC Scopus subject areas

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