Adaptive Power Control Using Current Adjustment for Watt-Level Power Amplifiers in CMOS SOI

Soroush Moallemi, Payam Mehr, Kevin Grout, Trevor J. Thornton, Jennifer Kitchen

Research output: Contribution to journalArticle

Abstract

This brief demonstrates the effectiveness of utilizing a 4-bit current steering digital to analog converter (DAC) as an adaptive power controller to adjust the dc quiescent current of a linear power amplifier as a function of the input signal power. A custom made metal-semiconductor field-effect transistor (MESFET), which is used as the amplifying transistor, and a current steering DAC have been integrated on the same substrate to minimize the power amplifier's form factor and mismatches between the power tracker and the MESFET. This design has been implemented in a 45-nm CMOS SOI global foundries (GFs) process with a nominal supply voltage of 0.9 V and provides 31.8 dBm of output power, 45% peak efficiency and 24 dB maximum power gain. Measurement results at 70 MHz reveal about 10% efficiency improvement at 6-dB power back-off with continuous wave and 5% for standard 16-PSK EDGE modulated signals. The amplifier shows error vector magnitude of 5% and ACPR of -56.9 dBc at 400 kHz offset from the carrier frequency without digital pre-distortion, while transmitting 27 dBm of modulated output power.

Original languageEnglish (US)
Article number8706688
Pages (from-to)605-609
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume67
Issue number4
DOIs
StatePublished - Apr 2020
Externally publishedYes

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Keywords

  • average power tracking
  • CMOS SOI
  • digital to analog converter
  • envelope tracking
  • MESFET
  • Power amplifier

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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