A VLSI architecture for real-time hierarchical encoding/decoding of video using the wavelet transform

Mohan Vishwanath, Chaitali Chakrabarti

Research output: Contribution to journalConference articlepeer-review

12 Scopus citations

Abstract

Novel online algorithms and architectures for hierarchical coding using the wavelet transform are presented. These algorithms/architectures compute the decomposition-reconstruction cycle of the wavelet transform with minimum latency and buffering for any given blocking factor. A hierarchical scheme which enables cheap video conferencing and/or multicast over a heterogeneous network is also presented. This architecture supports single chip implementations of the encoder, the decoder, and the transcoder for some choices of the wavelet filter and vector quantization schemes.

Original languageEnglish (US)
Article number389636
Pages (from-to)II401-II404
JournalICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
Volume2
DOIs
StatePublished - 1994
EventProceedings of the 1994 IEEE International Conference on Acoustics, Speech and Signal Processing. Part 2 (of 6) - Adelaide, Aust
Duration: Apr 19 1994Apr 22 1994

ASJC Scopus subject areas

  • Software
  • Signal Processing
  • Electrical and Electronic Engineering

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