A very high energy-efficiency switching technique for SAR ADCs

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

A high energy-efficiency capacitor switching scheme for a successive approximation register (SAR) analog-to-digital converter (ADC) is presented in this paper. The proposed switching technique achieves a zero energy dissipation in the first 2 comparison cycles and a 4X reduction in total capacitance used in the digital-to-analog converter (DAC), i.e., for the same total capacitance, the proposed technique can produce 2 additional bits of resolution than a conventional SAR. The proposed method can achieve 95% savings in switching energy over a conventional SAR. The result has been verified through behavioral simulations.

Original languageEnglish (US)
Title of host publication2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
Pages229-232
Number of pages4
DOIs
StatePublished - 2013
Externally publishedYes
Event2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013 - Columbus, OH, United States
Duration: Aug 4 2013Aug 7 2013

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Conference

Conference2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
Country/TerritoryUnited States
CityColumbus, OH
Period8/4/138/7/13

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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