TY - GEN
T1 - A very high energy-efficiency switching technique for SAR ADCs
AU - Sanyal, Arindam
AU - Sun, Nan
PY - 2013
Y1 - 2013
N2 - A high energy-efficiency capacitor switching scheme for a successive approximation register (SAR) analog-to-digital converter (ADC) is presented in this paper. The proposed switching technique achieves a zero energy dissipation in the first 2 comparison cycles and a 4X reduction in total capacitance used in the digital-to-analog converter (DAC), i.e., for the same total capacitance, the proposed technique can produce 2 additional bits of resolution than a conventional SAR. The proposed method can achieve 95% savings in switching energy over a conventional SAR. The result has been verified through behavioral simulations.
AB - A high energy-efficiency capacitor switching scheme for a successive approximation register (SAR) analog-to-digital converter (ADC) is presented in this paper. The proposed switching technique achieves a zero energy dissipation in the first 2 comparison cycles and a 4X reduction in total capacitance used in the digital-to-analog converter (DAC), i.e., for the same total capacitance, the proposed technique can produce 2 additional bits of resolution than a conventional SAR. The proposed method can achieve 95% savings in switching energy over a conventional SAR. The result has been verified through behavioral simulations.
UR - http://www.scopus.com/inward/record.url?scp=84893185636&partnerID=8YFLogxK
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U2 - 10.1109/MWSCAS.2013.6674627
DO - 10.1109/MWSCAS.2013.6674627
M3 - Conference contribution
AN - SCOPUS:84893185636
SN - 9781479900664
T3 - Midwest Symposium on Circuits and Systems
SP - 229
EP - 232
BT - 2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
T2 - 2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
Y2 - 4 August 2013 through 7 August 2013
ER -