A unified approach for full chip statistical timing and leakage analysis of nanoscale circuits considering intradie process variations

Sarvesh Bhardwaj, Sarma Vrudhula, Amit Goel

Research output: Contribution to journalArticle

20 Citations (Scopus)

Abstract

In this paper, we present a unified approach for the statistical timing and leakage analysis of circuits in the presence of intradie variations. The intradie variations in device parameters are modeled as a spatial stochastic process with a given covariance function. The covariance function is used to construct a Karhunen-Loéve expansion of the spatial process. This leads to representing the various parameters of all components on the chip in terms of a common set of abstract random variables. The leakage and propagation delay of each gate are represented as quadratic polynomials (QPs), which are elements of a vector space whose bases are multivariate quadratic orthogonal polynomials of the device parameters. In the case of signal arrival times, we describe an efficient method to propagate the QPs through the circuit to obtain a QP representation of the signal arrival times at the primary outputs. The analysis is extended to include sequential components so that flip-flop parameters and clock arrival times can be treated as random variables. This allows efficient estimation of the timing yield of the circuit. We show how a similar representation of QP can be used to model leakage of gates and develop an efficient method to compute a QP representation of the total chip leakage. The proposed techniques and quadratic models were exercised on ISCAS89 benchmark circuits and compared with Monte Carlo (MC) simulations. The results show that the techniques are very accurate and several orders of magnitude faster than MC simulation.

Original languageEnglish (US)
Article number4627541
Pages (from-to)1812-1825
Number of pages14
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume27
Issue number10
DOIs
StatePublished - Oct 2008

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Polynomials
Networks (circuits)
Random variables
Flip flop circuits
Vector spaces
Random processes
Clocks
Monte Carlo simulation

Keywords

  • Correlation
  • Leakage currents
  • Semiconductor process modeling
  • Stochastic circuits
  • Timing

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Graphics and Computer-Aided Design
  • Software

Cite this

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