A TDC-based test platform for dynamic circuit aging characterization

Min Chen, Vijay Reddy, John Carulli, Srikanth Krishnan, Vijay Rentala, Venkatesh Srinivasan, Yu Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

15 Scopus citations

Abstract

An on-chip 45nm test platform that directly monitors circuit performance degradation during dynamic operation is demonstrated. In contrast to traditional ring-oscillator (RO) based frequency measurements, it utilizes a Time-to-Digital Converter (TDC) with 2ps resolution to efficiently monitor circuit delay change on-the-fly. This new technique allows the capability of measuring signal edge degradation under various realistic circuit operating scenarios, such as asymmetric aging, dynamic voltage/frequency scaling, dynamic duty cycle factors, and temperature variations.

Original languageEnglish (US)
Title of host publication2011 International Reliability Physics Symposium, IRPS 2011
Pages2B.2.1-2B.2.5
DOIs
StatePublished - Jun 23 2011
Event49th International Reliability Physics Symposium, IRPS 2011 - Monterey, CA, United States
Duration: Apr 10 2011Apr 14 2011

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
ISSN (Print)1541-7026

Other

Other49th International Reliability Physics Symposium, IRPS 2011
CountryUnited States
CityMonterey, CA
Period4/10/114/14/11

Keywords

  • NBTI
  • RO
  • TDC
  • asymetric aging
  • duty cycle
  • relibility
  • test structure
  • variations

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Chen, M., Reddy, V., Carulli, J., Krishnan, S., Rentala, V., Srinivasan, V., & Cao, Y. (2011). A TDC-based test platform for dynamic circuit aging characterization. In 2011 International Reliability Physics Symposium, IRPS 2011 (pp. 2B.2.1-2B.2.5). [5784448] (IEEE International Reliability Physics Symposium Proceedings). https://doi.org/10.1109/IRPS.2011.5784448