A self-calibrated on-chip phase-noise-measurement circuit with -75dBc single-tone sensitivity at 100kHz offset

Waleed Khalil; Bertan Bakkaloglu; Sayfe Klaei

doi:10.1109/ISSCC.2007.373536

A self-calibrated on-chip phase-noise-measurement circuit with -75dBc single-tone sensitivity at 100kHz offset

Waleed Khalil, Bertan Bakkaloglu, Sayfe Klaei

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Scopus citations

Abstract

An on-chip phase-noise-measurement circuit with single-tone measurement sensitivity of -75dBc at 100kHz offset from carrier is presented. The circuit uses a delay-line and mixer frequency discriminator and can operate up to 2GHz input frequency. This module does not rely on a reference clock and, with on-line self calibration, its accuracy is stabilized across gate-delay variations.

Original language	English (US)
Title of host publication	2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	546-621
Number of pages	76
ISBN (Print)	1424408539, 9781424408535
DOIs	https://doi.org/10.1109/ISSCC.2007.373536
State	Published - 2007
Event	54th IEEE International Solid-State Circuits Conference, ISSCC 2007 - San Francisco, CA, United States Duration: Feb 11 2007 → Feb 15 2007

Publication series

Name	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN (Print)	0193-6530

Other

Other	54th IEEE International Solid-State Circuits Conference, ISSCC 2007
Country/Territory	United States
City	San Francisco, CA
Period	2/11/07 → 2/15/07

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Access to Document

10.1109/ISSCC.2007.373536

Cite this

Khalil, W., Bakkaloglu, B., & Klaei, S. (2007). A self-calibrated on-chip phase-noise-measurement circuit with -75dBc single-tone sensitivity at 100kHz offset. In 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers (pp. 546-621). Article 4242507 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC.2007.373536

A self-calibrated on-chip phase-noise-measurement circuit with -75dBc single-tone sensitivity at 100kHz offset. / Khalil, Waleed; Bakkaloglu, Bertan; Klaei, Sayfe.
2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 2007. p. 546-621 4242507 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Khalil, W, Bakkaloglu, B & Klaei, S 2007, A self-calibrated on-chip phase-noise-measurement circuit with -75dBc single-tone sensitivity at 100kHz offset. in 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers., 4242507, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Institute of Electrical and Electronics Engineers Inc., pp. 546-621, 54th IEEE International Solid-State Circuits Conference, ISSCC 2007, San Francisco, CA, United States, 2/11/07. https://doi.org/10.1109/ISSCC.2007.373536

Khalil W, Bakkaloglu B, Klaei S. A self-calibrated on-chip phase-noise-measurement circuit with -75dBc single-tone sensitivity at 100kHz offset. In 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc. 2007. p. 546-621. 4242507. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). doi: 10.1109/ISSCC.2007.373536

Khalil, Waleed ; Bakkaloglu, Bertan ; Klaei, Sayfe. / A self-calibrated on-chip phase-noise-measurement circuit with -75dBc single-tone sensitivity at 100kHz offset. 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 2007. pp. 546-621 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

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abstract = "An on-chip phase-noise-measurement circuit with single-tone measurement sensitivity of -75dBc at 100kHz offset from carrier is presented. The circuit uses a delay-line and mixer frequency discriminator and can operate up to 2GHz input frequency. This module does not rely on a reference clock and, with on-line self calibration, its accuracy is stabilized across gate-delay variations.",

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A self-calibrated on-chip phase-noise-measurement circuit with -75dBc single-tone sensitivity at 100kHz offset

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