A scalable, CMOS-compatible assembly of ambipolar semiconducting single-walled carbon nanotube devices

Marc Ganzhorn; Aravind Vijayaraghavan; Alexander A. Green; Simone Dehm; Achim Voigt; Michael Rapp; Mark C. Hersam; Ralph Krupke

doi:10.1002/adma.201004640

A scalable, CMOS-compatible assembly of ambipolar semiconducting single-walled carbon nanotube devices

Marc Ganzhorn, Aravind Vijayaraghavan, Alexander A. Green, Simone Dehm, Achim Voigt, Michael Rapp, Mark C. Hersam, Ralph Krupke

Research output: Contribution to journal › Article › peer-review

35 Scopus citations

Abstract

Semiconducting single-walled carbon nanotubes are integrated into high-density arrays using dielectrophoresis, which is a CMOS-compatible, bottom-up assembly technique. The devices are statistically analyzed by voltage-contrast scanning electron microscopy and electron transport measurements. Annealing and the choice of parylene substrate are shown to improve device performance.

Original language	English (US)
Pages (from-to)	1734-1738
Number of pages	5
Journal	Advanced Materials
Volume	23
Issue number	15
DOIs	https://doi.org/10.1002/adma.201004640
State	Published - Apr 19 2011
Externally published	Yes

Keywords

carbon nanotubes
chirality
dielectrophoresis
field-effect transistors

ASJC Scopus subject areas

General Materials Science
Mechanics of Materials
Mechanical Engineering

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10.1002/adma.201004640

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abstract = "Semiconducting single-walled carbon nanotubes are integrated into high-density arrays using dielectrophoresis, which is a CMOS-compatible, bottom-up assembly technique. The devices are statistically analyzed by voltage-contrast scanning electron microscopy and electron transport measurements. Annealing and the choice of parylene substrate are shown to improve device performance.",

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AU - Dehm, Simone

AU - Voigt, Achim

AU - Rapp, Michael

AU - Hersam, Mark C.

AU - Krupke, Ralph

PY - 2011/4/19

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AB - Semiconducting single-walled carbon nanotubes are integrated into high-density arrays using dielectrophoresis, which is a CMOS-compatible, bottom-up assembly technique. The devices are statistically analyzed by voltage-contrast scanning electron microscopy and electron transport measurements. Annealing and the choice of parylene substrate are shown to improve device performance.

KW - carbon nanotubes

KW - chirality

KW - dielectrophoresis

KW - field-effect transistors

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A scalable, CMOS-compatible assembly of ambipolar semiconducting single-walled carbon nanotube devices

Abstract

Keywords

ASJC Scopus subject areas

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