Skip to main navigation
Skip to search
Skip to main content
Arizona State University Home
Home
Profiles
Departments and Centers
Scholarly Works
Activities
Equipment
Grants
Datasets
Prizes
Search by expertise, name or affiliation
A Robust Low Power Field Programmable Threshold Logic Gate Array
Sarma Vrudhula
(Inventor)
Arizona State University
Research output
:
Patent
Overview
Fingerprint
Fingerprint
Dive into the research topics of 'A Robust Low Power Field Programmable Threshold Logic Gate Array'. Together they form a unique fingerprint.
Sort by
Weight
Alphabetically
Earth & Environmental Sciences
nanotechnology
100%
new technology
53%
innovation
49%
semiconductor industry
41%
directory
36%
computer vision
36%
bioinformatics
35%
metal oxide
33%
semiconductor
31%
speech
30%
leakage
26%
state of the art
24%
material
23%
imagery
22%
calculation
15%
need
15%
cost
14%