A robust edge encoding technique for energy-efficient multi-cycle interconnect

Jae Sun Seo; Himanshu Kaul; Ram Krishnamurthy; Dennis Sylvester; David Blaauw

doi:10.1109/TVLSI.2009.2032422

A robust edge encoding technique for energy-efficient multi-cycle interconnect

Jae Sun Seo, Himanshu Kaul, Ram Krishnamurthy, Dennis Sylvester, David Blaauw

Research output: Contribution to journal › Article › peer-review

11 Scopus citations

Abstract

In this paper, we propose a new circuit technique for on-chip communication, the edge encoding technique, to reduce the energy consumption in multi-cycle interconnects. Both average and worst-case energy are reduced by desynchronizing the edges of rising and falling transitions. In a 1.2 V 65-nm CMOS technology, the proposed approach achieves up to 34% energy reduction with no latency overhead over optimally designed conventional busses due to coupling capacitance reductions. The technique further reduces energy consumption by 39% with iso-throughput at the expense of one-cycle latency. Energy savings are shown to be both larger and more robust to process, voltage, and temperature variations than previous techniques.

Original language	English (US)
Article number	5286242
Pages (from-to)	264-273
Number of pages	10
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	19
Issue number	2
DOIs	https://doi.org/10.1109/TVLSI.2009.2032422
State	Published - Feb 2011
Externally published	Yes

Keywords

Bus encoding
interconnects
on-chip communication
repeater
variation

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/TVLSI.2009.2032422

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abstract = "In this paper, we propose a new circuit technique for on-chip communication, the edge encoding technique, to reduce the energy consumption in multi-cycle interconnects. Both average and worst-case energy are reduced by desynchronizing the edges of rising and falling transitions. In a 1.2 V 65-nm CMOS technology, the proposed approach achieves up to 34% energy reduction with no latency overhead over optimally designed conventional busses due to coupling capacitance reductions. The technique further reduces energy consumption by 39% with iso-throughput at the expense of one-cycle latency. Energy savings are shown to be both larger and more robust to process, voltage, and temperature variations than previous techniques.",

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note = "Funding Information: Manuscript received May 04, 2009; revised July 14, 2009. First published October 13, 2009; current version published January 21, 2011. This work was supported in part by the National Science Foundation and by the Samsung Scholarship Foundation.",

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AU - Krishnamurthy, Ram

AU - Sylvester, Dennis

AU - Blaauw, David

N1 - Funding Information: Manuscript received May 04, 2009; revised July 14, 2009. First published October 13, 2009; current version published January 21, 2011. This work was supported in part by the National Science Foundation and by the Samsung Scholarship Foundation.

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A robust edge encoding technique for energy-efficient multi-cycle interconnect

Abstract

Keywords

ASJC Scopus subject areas

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