A Post-Quantum Secure Discrete Gaussian Noise Sampler

Rashmi Agrawal, Lake Bu, Michel A. Kinsy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

While the notion of achieving 'quantum supremacy' may be debatable, rapid developments in the field of quantum computing are heading towards more realistic quantum computers. As practical quantum computers start becoming more feasible, the requirement to have quantum secure cryptosystems becomes more compelling. Due to its many advantages, lattice based cryptography has become one of the key candidates for designing secure systems for the post-quantum era. The security of lattice-based cryptography is governed by the small error samples generated from a Gaussian distribution. Hence, the Gaussian distribution lies at the core of these cryptosystems. In this paper, we present the hardware design implementation of three different sampling algorithms including rejection, Box-Muller, and the Ziggurat method for the Gaussian Sampler. Our goal is to provide concrete recommendations for future use and adoption in various cryptosystems based on sampling efficiency, hardware cost and throughput. The key feature of our design implementation is that it performs high-precision sampling to meet the NIST's recommended security level of 112-bits or higher for the postquantum era, which most existing hardware implementations fail to do. Furthermore, our design implementation is highly optimized for FPGA-based implementation and is also generic so that it can be seamlessly integrated into most cryptosystems. Synthesis results are obtained using Vivado design suite for a Xilinx Zynq-7010 CLG400ACX1341 FPGA board.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages295-304
Number of pages10
ISBN (Electronic)9781728174051
DOIs
StatePublished - Dec 7 2020
Externally publishedYes
Event2020 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2020 - Virtual, San Jose, United States
Duration: Dec 7 2020Dec 11 2020

Publication series

NameProceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2020

Conference

Conference2020 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2020
Country/TerritoryUnited States
CityVirtual, San Jose
Period12/7/2012/11/20

Keywords

  • Box-Muller
  • Gaussian Noise Sampler
  • Lattice-based
  • R-LWE
  • Rejection
  • Ziggurat

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Signal Processing
  • Safety, Risk, Reliability and Quality
  • Hardware and Architecture

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