A new balanced 4-moduli set {2k, 2n - 1, 2 n + 1, 2n+1-1} and its reverse converter design for efficient FIR filter implementation

Gayathri Chalivendra, Vinay Hanumaiah, Sarma Vrudhula

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Scopus citations

Abstract

This paper presents a new four moduli residue number system of the form {2k, 2n-1, 2n+1-1}, n ≤ k ≤ 2n, which is an enhancement of the popular four-moduli set {2n,2 n-1,2n,2n+1-1} (for even n). Our k-mod4 moduli set achieves a higher dynamic range and a better balancing of the binary channels. Using the proposed k-mod4 moduli set helps in reducing the hardware complexity of arithmetic circuits compared with other four-moduli sets for the same performance. Additionally, we provide a reverse converter design, whose hardware complexity and performance are shown to be better than the existing reverse converters for the same dynamic range. Experimental results comparing RNS multiply and accumulate units implemented using the proposed four-moduli set with the state-of-the-art balanced four-moduli sets, show large improvements in area (46%) and power (43%) reduction for various dynamic ranges. This makes our k-mod4 moduli set ideal for digital filters implementation.

Original languageEnglish (US)
Title of host publicationGLSVLSI'11 - Proceedings of the 2011 Great Lakes Symposium on VLSI
Pages139-144
Number of pages6
DOIs
StatePublished - Jun 3 2011
Event21st Great Lakes Symposium on VLSI, GLSVLSI 2011 - Lausanne, Switzerland
Duration: May 2 2011May 4 2011

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Other

Other21st Great Lakes Symposium on VLSI, GLSVLSI 2011
CountrySwitzerland
CityLausanne
Period5/2/115/4/11

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Keywords

  • 4-moduli set
  • High speed FIR filter
  • RNS
  • Reverse converter design

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Chalivendra, G., Hanumaiah, V., & Vrudhula, S. (2011). A new balanced 4-moduli set {2k, 2n - 1, 2 n + 1, 2n+1-1} and its reverse converter design for efficient FIR filter implementation. In GLSVLSI'11 - Proceedings of the 2011 Great Lakes Symposium on VLSI (pp. 139-144). (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI). https://doi.org/10.1145/1973009.1973038