A methodology for characterization of large macro cells and IP blocks considering process variations

Amit Goel, Sarma Vrudhula, Feroze Taraporevala, Praveen Ghanta

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Scopus citations

Abstract

Integrated circuits today rely on extensive re-use of pre-characterized IP bocks and macro cells to meet the demand for high performance system on chip (SoC). In this paper we propose a methodology for characterization of IP blocks and macro cells for statistical timing analysis considering process variations and spatial correlations. We develop efficient models for capturing both inter-die and intra-die variations in devices and interconnects. Increasing variability of the process parameters in sub-nanometer designs requires instance-specific characterization of these design blocks. We propose a technique for instance-specific calibration of pre-characterized timing model. The proposed approach was evaluated on large industrial designs of 1.2M and 3.5M gates in 65nm technology and validated against SPICE for accuracy.

Original languageEnglish (US)
Title of host publicationProceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008
Pages200-206
Number of pages7
DOIs
StatePublished - Aug 25 2008
Event9th International Symposium on Quality Electronic Design, ISQED 2008 - San Jose, CA, United States
Duration: Mar 17 2008Mar 19 2008

Publication series

NameProceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008

Other

Other9th International Symposium on Quality Electronic Design, ISQED 2008
CountryUnited States
CitySan Jose, CA
Period3/17/083/19/08

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Goel, A., Vrudhula, S., Taraporevala, F., & Ghanta, P. (2008). A methodology for characterization of large macro cells and IP blocks considering process variations. In Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008 (pp. 200-206). [4479726] (Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008). https://doi.org/10.1109/ISQED.2008.4479726