In this work, a switched-capacitor voltage regulator (SCVR) that dithers flying capacitance to reduce output voltage ripple is presented, and the benefits of such ripple reduction are investigated. In the proposed technique, SC converters are designed to run at the maximum available frequency, and the flying capacitance for different phases is adjusted according to load current change through comparators and a digital controller. The proposed technique is demonstrated in a 65 nm test chip consisting of a 40-phase SCVR with 4b capacitance modulation (CM) and a 2:1 conversion ratio. On-chip circuits for ripple measurement and load performance monitoring were included to accurately assess the magnitude and impact of ripple reduction. Measurement results show that at a 2.3 V input, an on-chip ripple magnitude of 6–16 mV at 1 V output is achieved for 11–142 mA load. Peak efficiency is 70.8% at a power density of [Formula: see text] .
ASJC Scopus subject areas
- Electrical and Electronic Engineering