A highly reliable and tamper-resistant RRAM PUF: Design and experimental validation

Rui Liu, Huaqiang Wu, Yachun Pang, He Qian, Shimeng Yu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

43 Scopus citations

Abstract

This work presents a highly reliable and tamper-resistant design of Physical Unclonable Function (PUF) exploiting Resistive Random Access Memory (RRAM). The RRAM PUF properties such as uniqueness and reliability are experimentally measured on 1 kb Hfû2 based RRAM arrays. Firstly, our experimental results show that selection of the split reference and offset of the split sense amplifier (S/A) significantly affect the uniqueness. More dummy cells are able to generate a more accurate split reference, and relaxing transistor's sizes of the split S/A can reduce the offset, thus achieving better uniqueness. The average inter-Hamming distance (HD) of 40 RRAM PUF instances is ∼42%. Secondly, we propose using the sum of the read-out currents of multiple RRAM cells for generating one response bit, which statistically minimizes the risk of early retention failure of a single cell. The measurement results show that with 8 cells per bit, 0% intra-HD can maintain more than 50 hours at 150 °C or equivalently 10 years at 69 °C by 1/kT extrapolation. Finally, we propose a layout obfuscation scheme where all the S/A are randomly embedded into the RRAM array to improve the RRAM PUF's resistance against invasive tampering. The RRAM cells are uniformly placed between M4 and M5 across the array. If the adversary attempts to invasively probe the output of the S/A, he has to remove the top-level interconnect and destroy the RRAM cells between the interconnect layers. Therefore, the RRAM PUF has the self-destructive feature. The hardware overhead of the proposed design strategies is benchmarked in 64 × 128 RRAM PUF array at 65 nm, while these proposed optimization strategies increase latency, energy and area over a naive implementation, they significantly improve the performance and security.

Original languageEnglish (US)
Title of host publicationProceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages13-18
Number of pages6
ISBN (Electronic)9781467388252
DOIs
StatePublished - Jun 20 2016
Event2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2016 - McLean, United States
Duration: May 3 2016May 5 2016

Other

Other2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2016
Country/TerritoryUnited States
CityMcLean
Period5/3/165/5/16

Keywords

  • hardware security
  • layout obfuscation
  • PUF
  • reliability
  • RRAM
  • tamper resistance

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality

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