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A highly integrated 65-nm SoC process with enhanced power/performance of digital and analog circuits
L. T. Clark, D. Zhao, T. Bakhishev, H. Ahn, E. Boling, M. Duane, K. Fujita, P. Gregory, T. Hoffmann, M. Hori, D. Kanai, D. Kidd, S. Lee, Y. Liu, J. Mitani, J. Nagayama, S. Pradhan, P. Ranade, R. Rogenmoser, L. Scudder
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
9
Scopus
citations