A framework for accelerating neuromorphic-vision algorithms on FPGAs

M. Debole, A. Al Maashri, M. Cotter, C. L. Yu, Chaitali Chakrabarti, V. Narayanan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Scopus citations

Abstract

Implementations of neuromorphic algorithms are traditionally implemented on platforms which consume significant power, falling short of their biologically underpinnings. Recent improvements in FPGA technology have led to FPGAs becoming a platform in which these rapidly evolving algorithms can be implemented. Unfortunately, implementing designs on FPGAs still prove challenging for nonexperts, limiting their use in the neuroscience domain. In this paper, a FPGA framework is presented which enables neuroscientists to compose multi-FPGA systems for a cortical object classification model. This is demonstrated by mapping this algorithm onto two distinct platforms providing speedups of up to 28X over a reference CPU implementation.

Original languageEnglish (US)
Title of host publication2011 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2011
Pages810-813
Number of pages4
DOIs
StatePublished - Dec 1 2011
Event2011 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2011 - San Jose, CA, United States
Duration: Nov 7 2011Nov 10 2011

Publication series

NameIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
ISSN (Print)1092-3152

Other

Other2011 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2011
Country/TerritoryUnited States
CitySan Jose, CA
Period11/7/1111/10/11

Keywords

  • FPGA application mapping
  • FPGA programming
  • Multi-FPGA partitioning
  • Neuromorphic vision algorithms

ASJC Scopus subject areas

  • Software
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design

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