A fast technique to screen carrier generation lifetime using DLTS on MOS capacitors

Arash Elhami Khorasani; Dieter K. Schroder; Terry Alford

doi:10.1109/TED.2014.2337898

A fast technique to screen carrier generation lifetime using DLTS on MOS capacitors

Arash Elhami Khorasani, Dieter K. Schroder, Terry Alford

Research output: Contribution to journal › Article › peer-review

5 Scopus citations

Abstract

We have developed a technique for fast screening of carrier generation lifetime in ultraclean silicon wafers by employing deep-level transient spectroscopy (DLTS) measurements on metal-oxide-semiconductor-capacitor (MOS-C) test structures. Results show that the screened lifetime is of sufficient accuracy to distinguish metallic impurities with densities as low as (10 ¹⁰) cm (10^-3) in thin p/p⁺ silicon epitaxial layers. The widely used classic pulsed MOS-C technique is shown to be inaccurate and unable to separate bulk and surface components of the lifetime, while its modified and more accurate versions are time consuming and unaffordable for process screening purposes.

Original language	English (US)
Article number	6867334
Pages (from-to)	3282-3288
Number of pages	7
Journal	IEEE Transactions on Electron Devices
Volume	61
Issue number	9
DOIs	https://doi.org/10.1109/TED.2014.2337898
State	Published - Sep 2014

Keywords

Carrier lifetimes
deep-level transient spectroscopy (DLTS)
metal-oxide-semiconductor capacitors (MOS-C)
semiconductor defects
semiconductor device measurements
semiconductor materials
silicon

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/TED.2014.2337898

Cite this

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title = "A fast technique to screen carrier generation lifetime using DLTS on MOS capacitors",

abstract = "We have developed a technique for fast screening of carrier generation lifetime in ultraclean silicon wafers by employing deep-level transient spectroscopy (DLTS) measurements on metal-oxide-semiconductor-capacitor (MOS-C) test structures. Results show that the screened lifetime is of sufficient accuracy to distinguish metallic impurities with densities as low as (10 10) cm (10-3) in thin p/p+ silicon epitaxial layers. The widely used classic pulsed MOS-C technique is shown to be inaccurate and unable to separate bulk and surface components of the lifetime, while its modified and more accurate versions are time consuming and unaffordable for process screening purposes.",

keywords = "Carrier lifetimes, deep-level transient spectroscopy (DLTS), metal-oxide-semiconductor capacitors (MOS-C), semiconductor defects, semiconductor device measurements, semiconductor materials, silicon",

author = "{Elhami Khorasani}, Arash and Schroder, {Dieter K.} and Terry Alford",

year = "2014",

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doi = "10.1109/TED.2014.2337898",

language = "English (US)",

volume = "61",

pages = "3282--3288",

journal = "IEEE Transactions on Electron Devices",

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AU - Elhami Khorasani, Arash

AU - Schroder, Dieter K.

AU - Alford, Terry

PY - 2014/9

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N2 - We have developed a technique for fast screening of carrier generation lifetime in ultraclean silicon wafers by employing deep-level transient spectroscopy (DLTS) measurements on metal-oxide-semiconductor-capacitor (MOS-C) test structures. Results show that the screened lifetime is of sufficient accuracy to distinguish metallic impurities with densities as low as (10 10) cm (10-3) in thin p/p+ silicon epitaxial layers. The widely used classic pulsed MOS-C technique is shown to be inaccurate and unable to separate bulk and surface components of the lifetime, while its modified and more accurate versions are time consuming and unaffordable for process screening purposes.

AB - We have developed a technique for fast screening of carrier generation lifetime in ultraclean silicon wafers by employing deep-level transient spectroscopy (DLTS) measurements on metal-oxide-semiconductor-capacitor (MOS-C) test structures. Results show that the screened lifetime is of sufficient accuracy to distinguish metallic impurities with densities as low as (10 10) cm (10-3) in thin p/p+ silicon epitaxial layers. The widely used classic pulsed MOS-C technique is shown to be inaccurate and unable to separate bulk and surface components of the lifetime, while its modified and more accurate versions are time consuming and unaffordable for process screening purposes.

KW - Carrier lifetimes

KW - deep-level transient spectroscopy (DLTS)

KW - metal-oxide-semiconductor capacitors (MOS-C)

KW - semiconductor defects

KW - semiconductor device measurements

KW - semiconductor materials

KW - silicon

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JO - IEEE Transactions on Electron Devices

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A fast technique to screen carrier generation lifetime using DLTS on MOS capacitors

Abstract

Keywords

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