Abstract
We have developed a technique for fast screening of carrier generation lifetime in ultraclean silicon wafers by employing deep-level transient spectroscopy (DLTS) measurements on metal-oxide-semiconductor-capacitor (MOS-C) test structures. Results show that the screened lifetime is of sufficient accuracy to distinguish metallic impurities with densities as low as (10 10) cm (10-3) in thin p/p+ silicon epitaxial layers. The widely used classic pulsed MOS-C technique is shown to be inaccurate and unable to separate bulk and surface components of the lifetime, while its modified and more accurate versions are time consuming and unaffordable for process screening purposes.
| Original language | English (US) |
|---|---|
| Article number | 6867334 |
| Pages (from-to) | 3282-3288 |
| Number of pages | 7 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 61 |
| Issue number | 9 |
| DOIs | |
| State | Published - 2014 |
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Keywords
- Carrier lifetimes
- deep-level transient spectroscopy (DLTS)
- metal-oxide-semiconductor capacitors (MOS-C)
- semiconductor defects
- semiconductor device measurements
- semiconductor materials
- silicon
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials
Cite this
A fast technique to screen carrier generation lifetime using DLTS on MOS capacitors. / Elhami Khorasani, Arash; Schroder, Dieter K.; Alford, Terry.
In: IEEE Transactions on Electron Devices, Vol. 61, No. 9, 6867334, 2014, p. 3282-3288.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - A fast technique to screen carrier generation lifetime using DLTS on MOS capacitors
AU - Elhami Khorasani, Arash
AU - Schroder, Dieter K.
AU - Alford, Terry
PY - 2014
Y1 - 2014
N2 - We have developed a technique for fast screening of carrier generation lifetime in ultraclean silicon wafers by employing deep-level transient spectroscopy (DLTS) measurements on metal-oxide-semiconductor-capacitor (MOS-C) test structures. Results show that the screened lifetime is of sufficient accuracy to distinguish metallic impurities with densities as low as (10 10) cm (10-3) in thin p/p+ silicon epitaxial layers. The widely used classic pulsed MOS-C technique is shown to be inaccurate and unable to separate bulk and surface components of the lifetime, while its modified and more accurate versions are time consuming and unaffordable for process screening purposes.
AB - We have developed a technique for fast screening of carrier generation lifetime in ultraclean silicon wafers by employing deep-level transient spectroscopy (DLTS) measurements on metal-oxide-semiconductor-capacitor (MOS-C) test structures. Results show that the screened lifetime is of sufficient accuracy to distinguish metallic impurities with densities as low as (10 10) cm (10-3) in thin p/p+ silicon epitaxial layers. The widely used classic pulsed MOS-C technique is shown to be inaccurate and unable to separate bulk and surface components of the lifetime, while its modified and more accurate versions are time consuming and unaffordable for process screening purposes.
KW - Carrier lifetimes
KW - deep-level transient spectroscopy (DLTS)
KW - metal-oxide-semiconductor capacitors (MOS-C)
KW - semiconductor defects
KW - semiconductor device measurements
KW - semiconductor materials
KW - silicon
UR - http://www.scopus.com/inward/record.url?scp=84906785230&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84906785230&partnerID=8YFLogxK
U2 - 10.1109/TED.2014.2337898
DO - 10.1109/TED.2014.2337898
M3 - Article
VL - 61
SP - 3282
EP - 3288
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
SN - 0018-9383
IS - 9
M1 - 6867334
ER -