TY - GEN
T1 - A digitally controlled DC-DC buck converter with automatic digital PFM to PWM transition scheme
AU - Beohar, Navankur
AU - Mandal, Debashis
AU - Parasuram, Vivek
AU - Reddy, Abhiram Mumma
AU - Kumar, Amit
AU - Malladi, Venkata N.K.
AU - Pappu, Karthik
AU - Fu, Chao
AU - Adell, Philippe C.
AU - Bakkaloglu, Bertan
N1 - Funding Information:
This work was supported by the NASA-Jet Propulsion Laboratory, California Institute of Technology under Department of Defense (DoD) funding.
Publisher Copyright:
© 2021 IEEE.
PY - 2021/6/14
Y1 - 2021/6/14
N2 - An automatic fully-digital pulse frequency modulation (PFM) to pulse width modulation (PWM) mode transition scheme for digitally controlled DC-DC buck converter is proposed in this paper. The meta-stability issues of time-based analog-to-digital converter (ADC) which result in incorrect loop control and output voltage artifacts are also addressed in the proposed design. The digital controller is designed and fabricated on a 0.18 μm 6 layer-metal CMOS technology with an active area of 1.61 mm2. The converter operates at a switching frequency of 1 MHz and supports a regulated output voltage ranging from 0.9 V to 3.3 V for an input voltage range between 3.3 V to 5 V. The converter can supply a maximum load current of 7.5 A, and has the peak efficiency of 95.56%.
AB - An automatic fully-digital pulse frequency modulation (PFM) to pulse width modulation (PWM) mode transition scheme for digitally controlled DC-DC buck converter is proposed in this paper. The meta-stability issues of time-based analog-to-digital converter (ADC) which result in incorrect loop control and output voltage artifacts are also addressed in the proposed design. The digital controller is designed and fabricated on a 0.18 μm 6 layer-metal CMOS technology with an active area of 1.61 mm2. The converter operates at a switching frequency of 1 MHz and supports a regulated output voltage ranging from 0.9 V to 3.3 V for an input voltage range between 3.3 V to 5 V. The converter can supply a maximum load current of 7.5 A, and has the peak efficiency of 95.56%.
KW - Automatic mode switching
KW - Digital control
KW - Digitally-controlled pulse-width modulation (DPWM)
KW - Dual-mode PFM/PWM converter
KW - Fully-digital PFM to PWM transition
KW - Pulse-frequency modulation (PFM)
KW - Pulse-width modulation (PWM)
KW - Synchronous DC-DC buck converter
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U2 - 10.1109/APEC42165.2021.9487365
DO - 10.1109/APEC42165.2021.9487365
M3 - Conference contribution
AN - SCOPUS:85115669421
T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
SP - 517
EP - 522
BT - 2021 IEEE Applied Power Electronics Conference and Exposition, APEC 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 36th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2021
Y2 - 14 June 2021 through 17 June 2021
ER -