A Design of a Fast and Area Efficient Multi-Input Muller C-element

Tzyh Yung Wuu; Sarma B.K. Vrudhula

doi:10.1109/92.238414

A Design of a Fast and Area Efficient Multi-Input Muller C-element

Tzyh Yung Wuu, Sarma B.K. Vrudhula

Research output: Contribution to journal › Article › peer-review

37 Scopus citations

Abstract

A multi-input Muller C-element has frequently been used for joining signal transitions or completion time detection in self-timed circuits. This paper presents an n-input Muller C-element design which uses the multi-level login design technique and has a symmetric format for any integer n > 2. In comparison with series-parallel MOS structure implementations and C-element tree implementations, our design has fewer restrictions in terms of n, less path delay, less delay variance from inputs to output, and less area consumption. Experimental validation in this paper is based on an industrial standard cell library.

Original language	English (US)
Pages (from-to)	215-219
Number of pages	5
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	1
Issue number	2
DOIs	https://doi.org/10.1109/92.238414
State	Published - Jun 1993
Externally published	Yes

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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abstract = "A multi-input Muller C-element has frequently been used for joining signal transitions or completion time detection in self-timed circuits. This paper presents an n-input Muller C-element design which uses the multi-level login design technique and has a symmetric format for any integer n > 2. In comparison with series-parallel MOS structure implementations and C-element tree implementations, our design has fewer restrictions in terms of n, less path delay, less delay variance from inputs to output, and less area consumption. Experimental validation in this paper is based on an industrial standard cell library.",

author = "Wuu, {Tzyh Yung} and Vrudhula, {Sarma B.K.}",

note = "Funding Information: Manuscript received November 24,1992; revsied March 5,1993. This work was supported by a grant from the University of Arizona Foundation. T.-Y.Wuu is with the Information Science Institute, University of Southem Califomia, Los Angeles, CA. S. B. K. Vrudhula is with the Electrical and Computer Engineering Department, University of Arizona, Tucson, AZ 85721. IEEE Log Number 9209466.",

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A Design of a Fast and Area Efficient Multi-Input Muller C-element

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