TY - GEN
T1 - A DC-DC digitally controlled buck regulator utilizing first-order Σ-Δ frequency discriminators
AU - Ahmad, Hani
AU - Bakkaloglu, Bertan
PY - 2008
Y1 - 2008
N2 - This paper describes a novel feedback digitization architecture for a digitally controlled PWM DC-DC buck converter. A combination of a VCO followed by an all digital first-order Σ-Δ frequency discriminators (SDFD) is used as a feedback analog-to-digital converter (ADC). The output of the discriminator is decimated to obtain a higher resolution depending on the output ripple specifications. A block diagram and a behavioral model are presented along with simulation results. Based on 1% allowed output voltage ripple, a 8-bit ADC resolution is achieved using a reference clock frequency of 16MHz. Since the SNR of this ADC is a strong function of sampling clock frequency and carrier frequency deviation, it is easy to achieve higher accuracy (resolution) to satisfy wide range of regulation and accuracy requirements. This architecture is flexible and scalable and can fully be implemented in standard digital CMOS.
AB - This paper describes a novel feedback digitization architecture for a digitally controlled PWM DC-DC buck converter. A combination of a VCO followed by an all digital first-order Σ-Δ frequency discriminators (SDFD) is used as a feedback analog-to-digital converter (ADC). The output of the discriminator is decimated to obtain a higher resolution depending on the output ripple specifications. A block diagram and a behavioral model are presented along with simulation results. Based on 1% allowed output voltage ripple, a 8-bit ADC resolution is achieved using a reference clock frequency of 16MHz. Since the SNR of this ADC is a strong function of sampling clock frequency and carrier frequency deviation, it is easy to achieve higher accuracy (resolution) to satisfy wide range of regulation and accuracy requirements. This architecture is flexible and scalable and can fully be implemented in standard digital CMOS.
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U2 - 10.1109/APEC.2008.4522745
DO - 10.1109/APEC.2008.4522745
M3 - Conference contribution
AN - SCOPUS:49249133106
SN - 9781424418749
T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
SP - 346
EP - 352
BT - 2008 23rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC
T2 - 2008 23rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC
Y2 - 24 February 2008 through 28 February 2008
ER -