Due to the rapidly growing technological ability to batch fabricate a large number of components on one substrate, it is economical and reliable to implement an associative memory by cellular arrays. Such an associative memory is presented in this paper. The proposed memory is word-organized, and its basic building blocks are cutpoint cells with various indices. All the bit-memories, word-sequential-control networks, word-match tag-networks, and bit-output networks have identical structures, and the proposed memory system is especially compatible with the manufacture of integrated circuit. The memory can perform the comparison, tag, writing and nondestructive reading processes in the parallel-by-bit form, as well as Lewin's sorting scheme for ordered retrieval. The dematching process is completely automatic. The memory sequential-control system does not use any ladder structure which is commonly employed in previous associative memory systems; hence the operation speed is largely increased. The stage delays for various operations are given, and may be employed to estimate the speed of the associative memory.
ASJC Scopus subject areas
- Computational Theory and Mathematics
- Hardware and Architecture
- Theoretical Computer Science