A coprocessor architecture for fast protein structure prediction

M. Marolia, R. Khoja, T. Acharya, Chaitali Chakrabarti

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Predicting protein structure from amino acid sequence is computationally very intensive. In order to speed up protein sequence matching and processing, it is necessary to develop special purpose VLSI architectures that exploit the underlying computational structures. In this paper, we present a coprocessor architecture for fast protein structure prediction based on the PSIPRED algorithm. The architecture consists of systolic arrays to speed up the data intensive sequence alignment and structure prediction steps, and finite state machines for the control dominated steps. The architecture has been synthesized using Synopsis DC Compiler using 0.18 μm CMOS technology. The synthesized architecture requires 783,228 units of gate area and 226KB of memory, and can be clocked at 100 MHz. The architecture processes amino acid sequences extremely fast; for a database of 135,000,000 amino acids, the secondary structure of a query sequence of length ∼150 amino acids can be predicted in ∼11 seconds.

Original languageEnglish (US)
Title of host publicationSiPS 2005
Subtitle of host publicationIEEE Workshop on Signal Processing Systems - Design and Implementation, Proceedings
Pages413-418
Number of pages6
DOIs
StatePublished - 2005
EventSiPS 2005: IEEE Workshop on Signal Processing Systems - Design and Implementation - Athens, Greece
Duration: Nov 2 2005Nov 4 2005

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Volume2005
ISSN (Print)1520-6130

Other

OtherSiPS 2005: IEEE Workshop on Signal Processing Systems - Design and Implementation
Country/TerritoryGreece
CityAthens
Period11/2/0511/4/05

ASJC Scopus subject areas

  • Media Technology
  • Signal Processing

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