A compiler optimization to reduce soft errors in register files

Jongeun Lee, Aviral Shrivastava

Research output: Contribution to journalArticle

10 Citations (Scopus)

Abstract

Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing critical path of the processor, but also since it is one of the hottest blocks on the chip, and therefore adding any extra circuitry to it is not desirable. Pure software approaches would be ideal in this case, but previous approaches that are based on program duplication have very significant runtime overheads, and others based on instruction scheduling are only moderately effective due to local scope. We show that the problem of protecting registers inherently requires inter-procedural analysis, and intra-procedural optimization are ineffective. This paper presents a pure compiler approach, based on inter-procedural code analysis to reduce the vulnerability of registers by temporarily writing live variables to protected memory. We formulate the problem as an integer linear programming problem and also present a very efficient heuristic algorithm. Our experiments demonstrate that our proposed technique can reduce the vulnerability of the RF by 33 - 37% on average and up to 66%, with a small 2% increase in runtime. In addition, our overhead reduction optimizations can effectively reduce the code size overhead, by more than 40% on average, to a mere 5 - 6%, as compared to highly optimized binaries.

Original languageEnglish (US)
Pages (from-to)41-49
Number of pages9
JournalACM SIGPLAN Notices
Volume44
Issue number7
StatePublished - Jul 2009

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Heuristic algorithms
Linear programming
Redundancy
Scheduling
Data storage equipment
Experiments

Keywords

  • Architectural vulnerability factor
  • Compilation
  • Embedded system
  • Link-time optimization
  • Register file
  • Soft error
  • Static analysis

ASJC Scopus subject areas

  • Computer Science(all)

Cite this

A compiler optimization to reduce soft errors in register files. / Lee, Jongeun; Shrivastava, Aviral.

In: ACM SIGPLAN Notices, Vol. 44, No. 7, 07.2009, p. 41-49.

Research output: Contribution to journalArticle

@article{c81d0312fd1c4d5690fce5f96813e229,
title = "A compiler optimization to reduce soft errors in register files",
abstract = "Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing critical path of the processor, but also since it is one of the hottest blocks on the chip, and therefore adding any extra circuitry to it is not desirable. Pure software approaches would be ideal in this case, but previous approaches that are based on program duplication have very significant runtime overheads, and others based on instruction scheduling are only moderately effective due to local scope. We show that the problem of protecting registers inherently requires inter-procedural analysis, and intra-procedural optimization are ineffective. This paper presents a pure compiler approach, based on inter-procedural code analysis to reduce the vulnerability of registers by temporarily writing live variables to protected memory. We formulate the problem as an integer linear programming problem and also present a very efficient heuristic algorithm. Our experiments demonstrate that our proposed technique can reduce the vulnerability of the RF by 33 - 37{\%} on average and up to 66{\%}, with a small 2{\%} increase in runtime. In addition, our overhead reduction optimizations can effectively reduce the code size overhead, by more than 40{\%} on average, to a mere 5 - 6{\%}, as compared to highly optimized binaries.",
keywords = "Architectural vulnerability factor, Compilation, Embedded system, Link-time optimization, Register file, Soft error, Static analysis",
author = "Jongeun Lee and Aviral Shrivastava",
year = "2009",
month = "7",
language = "English (US)",
volume = "44",
pages = "41--49",
journal = "SIGPLAN Notices (ACM Special Interest Group on Programming Languages)",
issn = "1523-2867",
publisher = "Association for Computing Machinery (ACM)",
number = "7",

}

TY - JOUR

T1 - A compiler optimization to reduce soft errors in register files

AU - Lee, Jongeun

AU - Shrivastava, Aviral

PY - 2009/7

Y1 - 2009/7

N2 - Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing critical path of the processor, but also since it is one of the hottest blocks on the chip, and therefore adding any extra circuitry to it is not desirable. Pure software approaches would be ideal in this case, but previous approaches that are based on program duplication have very significant runtime overheads, and others based on instruction scheduling are only moderately effective due to local scope. We show that the problem of protecting registers inherently requires inter-procedural analysis, and intra-procedural optimization are ineffective. This paper presents a pure compiler approach, based on inter-procedural code analysis to reduce the vulnerability of registers by temporarily writing live variables to protected memory. We formulate the problem as an integer linear programming problem and also present a very efficient heuristic algorithm. Our experiments demonstrate that our proposed technique can reduce the vulnerability of the RF by 33 - 37% on average and up to 66%, with a small 2% increase in runtime. In addition, our overhead reduction optimizations can effectively reduce the code size overhead, by more than 40% on average, to a mere 5 - 6%, as compared to highly optimized binaries.

AB - Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing critical path of the processor, but also since it is one of the hottest blocks on the chip, and therefore adding any extra circuitry to it is not desirable. Pure software approaches would be ideal in this case, but previous approaches that are based on program duplication have very significant runtime overheads, and others based on instruction scheduling are only moderately effective due to local scope. We show that the problem of protecting registers inherently requires inter-procedural analysis, and intra-procedural optimization are ineffective. This paper presents a pure compiler approach, based on inter-procedural code analysis to reduce the vulnerability of registers by temporarily writing live variables to protected memory. We formulate the problem as an integer linear programming problem and also present a very efficient heuristic algorithm. Our experiments demonstrate that our proposed technique can reduce the vulnerability of the RF by 33 - 37% on average and up to 66%, with a small 2% increase in runtime. In addition, our overhead reduction optimizations can effectively reduce the code size overhead, by more than 40% on average, to a mere 5 - 6%, as compared to highly optimized binaries.

KW - Architectural vulnerability factor

KW - Compilation

KW - Embedded system

KW - Link-time optimization

KW - Register file

KW - Soft error

KW - Static analysis

UR - http://www.scopus.com/inward/record.url?scp=67650825001&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=67650825001&partnerID=8YFLogxK

M3 - Article

VL - 44

SP - 41

EP - 49

JO - SIGPLAN Notices (ACM Special Interest Group on Programming Languages)

JF - SIGPLAN Notices (ACM Special Interest Group on Programming Languages)

SN - 1523-2867

IS - 7

ER -