A comparator-based rail clamp

Ramachandran Venkatasubramanian; Kent Oertle; Sule Ozev

doi:10.1109/TVLSI.2015.2446460

A comparator-based rail clamp

Ramachandran Venkatasubramanian, Kent Oertle, Sule Ozev

Research output: Contribution to journal › Article › peer-review

5 Scopus citations

Abstract

A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with little residual energy. The design is able to support applications with power-ON time slower than 4μs, is immune to latch-ON, and recovers very quickly if falsely triggered. Experimental results and performance comparisons with the traditional circuit are presented.

Original language	English (US)
Article number	7163348
Pages (from-to)	1493-1502
Number of pages	10
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	24
Issue number	4
DOIs	https://doi.org/10.1109/TVLSI.2015.2446460
State	Published - Apr 2016

Keywords

CMOS integrated circuits
ESD protection design
electrostatic discharge (ESD)
rail clamp

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/TVLSI.2015.2446460

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title = "A comparator-based rail clamp",

abstract = "A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with little residual energy. The design is able to support applications with power-ON time slower than 4μs, is immune to latch-ON, and recovers very quickly if falsely triggered. Experimental results and performance comparisons with the traditional circuit are presented.",

keywords = "CMOS integrated circuits, ESD protection design, electrostatic discharge (ESD), rail clamp",

author = "Ramachandran Venkatasubramanian and Kent Oertle and Sule Ozev",

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AU - Oertle, Kent

AU - Ozev, Sule

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N2 - A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with little residual energy. The design is able to support applications with power-ON time slower than 4μs, is immune to latch-ON, and recovers very quickly if falsely triggered. Experimental results and performance comparisons with the traditional circuit are presented.

AB - A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with little residual energy. The design is able to support applications with power-ON time slower than 4μs, is immune to latch-ON, and recovers very quickly if falsely triggered. Experimental results and performance comparisons with the traditional circuit are presented.

KW - CMOS integrated circuits

KW - ESD protection design

KW - electrostatic discharge (ESD)

KW - rail clamp

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ER -

A comparator-based rail clamp

Abstract

Keywords

ASJC Scopus subject areas

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