A comparator-based rail clamp

Ramachandran Venkatasubramanian, Kent Oertle, Sule Ozev

Research output: Contribution to journalArticlepeer-review

4 Scopus citations


A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with little residual energy. The design is able to support applications with power-ON time slower than 4μs, is immune to latch-ON, and recovers very quickly if falsely triggered. Experimental results and performance comparisons with the traditional circuit are presented.

Original languageEnglish (US)
Article number7163348
Pages (from-to)1493-1502
Number of pages10
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number4
StatePublished - Apr 2016


  • CMOS integrated circuits
  • ESD protection design
  • electrostatic discharge (ESD)
  • rail clamp

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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